Floating Gate Memristor with Multi-Terminal Control for Neuromorphic Neurons
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Solution Overview
Problem
Current neuromorphic hardware systems face challenges in implementing neuron behavior efficiently due to mismatch between software-based artificial neural networks and von Neumann computer hardware, leading to high power consumption and limited data storage capacity.
Innovation Solution
A floating gate memristor device is developed, featuring a substrate, a floating gate, an insulating layer, and control terminals that allow for adjustment of the floating gate voltage and semiconductor channel conductance through controlled voltages, enabling the implementation of neuron behavior in neuromorphic devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software-based artificial neural networks are implemented on von Neumann computer hardware, then the system can perform neural network operations, but power consumption increases due to mismatch between operation schemes
Solution Approach 1:
The patent replaces the von Neumann architecture-based computational system with a neuromorphic hardware system that directly mimics biological neural networks. This substitution eliminates the mismatch between software-based neural networks and traditional computer hardware, thereby reducing power consumption while maintaining neural network operation capability.
Solution Approach 2:
The patent changes the fundamental operating parameters of the computing system by transitioning from voltage-based CMOS logic to conductance-based memristor operations. This parameter change enables direct hardware implementation of neural network operations, improving adaptability while reducing energy consumption.
2Adaptability or versatility
If conventional CMOS-based artificial neural networks are used, then the system can implement neural network functions, but hardware volume increases
Solution Approach 1:
The patent merges the computational and memory functions into a single neuromorphic hardware system using memristors. This consolidation eliminates the need for separate CMOS-based computational units and memory structures, thereby reducing hardware volume while maintaining full neural network functionality.
Solution Approach 2:
The patent creates a universal neuromorphic hardware platform where memristor devices can simultaneously perform synaptic weight storage, neural computation, and plasticity operations. This multi-functionality reduces the overall hardware volume compared to specialized CMOS-based implementations.
3Adaptability or versatility
If phase change memristor or RRAM-based memcapacitor is used to implement neuron behavior, then neuron operations can be realized, but data storage capacity and multiple state control are limited
Solution Approach 1:
The patent segments the control mechanism into multiple independent control terminals (first control terminal, second control terminal, third control terminal) that can independently adjust different aspects of floating gate potential. This segmentation enables precise control over multiple data states, increasing storage capacity beyond what single-terminal devices can achieve.
Solution Approach 2:
The patent adds dimensional complexity to the control space by introducing multiple control terminals with independent voltage control capabilities. This transforms the control from a single-dimensional voltage adjustment to a multi-dimensional control space, enabling finer granularity in data state representation and increased storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The floating gate memristor device allows for multiple data states to be stored and neuron behavior to be implemented, reducing power consumption and increasing data storage capacity in neuromorphic systems.
Implementation Method 1
an insulating layer covering the floating gate
Implementation Method 2
a first electrode including a plurality of control terminals disposed on the insulating layer and spaced apart from each other, wherein the plurality of control terminals vertically overlap the floating gate
Implementation Method 3
floating gate memristor device capable of storing data using a potential state of a floating gate
Data Source
AI summary
Disclosed is a floating gate memristor device comprising: a substrate; a floating gate disposed on the substrate; an insulating layer covering the floating gate; a first electrode including a plurality of control terminals disposed on the insulating layer and spaced apart from each other, wherein the plurality of control terminals vertically overlap the floating gate; a second electrode spaced away from the first electrode, wherein a ground voltage is applied to the second electrode; and a third electrode disposed on the substrate and electrically connected to the floating gate.