Floating-Gate Transistor Array for Weighted Sum Computation
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Solution Overview
Problem
Current software-based neural network designs face limitations in performing weighted sum computations due to the large number of weights required, leading to bottlenecks in power consumption, physical area, and performance, particularly in memory management and architecture efficiency.
Innovation Solution
An integrated circuit design utilizing floating-gate transistors, where subsets of transistors are interconnected with specific terminal connections and voltage configurations to isolate current flow, allowing for efficient weighted sum computations with a control circuit, input circuit, and output circuit to manage and generate outputs correlated to the current sourced collectively by the transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software-based neural network designs are used to perform weighted sum computations, then flexibility and programmability are improved, but power consumption increases and performance is limited due to memory management bottlenecks
Solution Approach 1:
The patent replaces software-based computational systems with hardware-based floating-gate transistor circuits. The floating-gate transistors physically embody weight values through their threshold voltages, enabling direct hardware computation of weighted sums without software interpretation overhead. This substitution of software control with dedicated hardware architecture reduces power consumption while maintaining computational flexibility through reconfigurable circuit designs.
Solution Approach 2:
The patent utilizes threshold voltage as a programmable parameter in floating-gate transistors to represent weight values. By changing the threshold voltage parameter of individual transistors, the system can reconfigure weight values without physical hardware changes. This parameter-based reconfiguration enables adaptive neural network implementation while avoiding the power-intensive memory access operations required by software-based approaches.
2Adaptability or versatility
If software-based neural network designs are used to perform weighted sum computations, then programmability is improved, but performance is limited due to memory management bottlenecks
Solution Approach 1:
The patent replaces software-based computational systems with hardware-based floating-gate transistor circuits. The floating-gate transistors physically embody weight values through their threshold voltages, enabling direct hardware computation of weighted sums without software interpretation overhead. This substitution of software control with dedicated hardware architecture reduces power consumption while maintaining computational flexibility through reconfigurable circuit designs.
Solution Approach 2:
The patent pre-programs weight values into the threshold voltages of floating-gate transistors before computation. This preliminary action of encoding weights in the physical properties of transistors eliminates the need for real-time memory access during computation, thereby removing the memory management bottleneck that limits performance in software-based systems while preserving programmability through initial weight configuration.
3Quantity of substance
If flash memory is used to store weights in neural networks, then weight storage capability is improved, but the architecture becomes inefficient requiring structures that can use one or a few weights at a time
Solution Approach 1:
The patent merges the weight storage function directly into the computational elements by using floating-gate transistors that simultaneously store weight values (via threshold voltage) and perform computation (via current modulation). This integration eliminates the separate weight storage memory structure required by flash memory approaches, allowing all weights to be actively utilized in parallel computation without the architectural inefficiency of sequential or limited weight access.
Solution Approach 2:
The floating-gate transistor serves multiple functions: it stores weight information in its threshold voltage, acts as a controllable current source for computation, and participates in the weighted sum calculation directly. This multi-functionality replaces the specialized flash memory storage structure with universal computational elements that handle both storage and processing, eliminating the architectural complexity of managing separate weight storage and access mechanisms.
4Quantity of substance
If flash memory is used to store weights, then weight storage capability is improved, but physical area increases due to inefficient architecture
Solution Approach 1:
The patent merges the weight storage function directly into the computational elements by using floating-gate transistors that simultaneously store weight values (via threshold voltage) and perform computation (via current modulation). This integration eliminates the separate weight storage memory structure required by flash memory approaches, allowing all weights to be actively utilized in parallel computation without the architectural inefficiency of sequential or limited weight access.
5Quantity of substance
If flash memory is used to store weights, then weight storage capability is improved, but computation speed decreases due to limited capability and slow operation
Solution Approach 1:
The patent pre-programs weight values into the threshold voltages of floating-gate transistors before computation. This preliminary action of encoding weights in the physical properties of transistors eliminates the need for real-time memory access during computation, thereby removing the memory management bottleneck that limits performance in software-based systems while preserving programmability through initial weight configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient and high-performance weighted sum computations by isolating current flow between transistors, reducing memory management bottlenecks, and improving power efficiency and area usage, allowing for scalable neural network processing.
Implementation Method 1
Each floating-gate transistor in the plurality of floating-gate transistors passes a current having a predetermined value that is a function of the voltage between the gate terminal and source terminal, its threshold voltage, and a voltage between its source terminal and its drain terminal
Implementation Method 2
The threshold voltage of the floating-gate transistors varies amongst the plurality of floating-gate transistors
Data Source
AI summary
A weighted sum is a key computation for many neural networks and other machine learning algorithms. Integrated circuit designs that perform a weighted sum are presented. Weights are stored as threshold voltages in an array of flash transistors. By putting the circuits into a well-defined voltage state, the transistors that hold one set of weights will pass current equal to the desired sum. The current flowing through a given transistor is unaffected by operation of remaining transistors in the circuit.