Floating Gate Transistor Programming with Concurrent Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional non-volatile memory programming techniques using floating gate transistors are inefficient due to a reiterative, sequential program and verification process, leading to substantial time investment and unpredictability in voltage drops, which limits the application of higher program voltages and increases the risk of junction breakdown.
Innovation Solution
A method that applies a program voltage to a floating gate transistor until a current threshold is reached, concurrently verifying programming and adjusting the voltage supply to emulate selection circuitry voltage drops, allowing for higher voltages to be applied safely and reducing the need for repetitive programming cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sequential program and verify process is used, then programming reliability is improved through verification, but programming time increases substantially
Solution Approach 1:
The patent merges the program and verify operations into a single concurrent cycle. The verify operation is performed simultaneously with the program operation by monitoring the floating gate transistor's conductivity during the programming process, rather than sequentially after programming completes. This eliminates the need for repeated programming cycles while maintaining reliability through continuous verification.
Solution Approach 2:
The patent implements feedback by continuously monitoring the floating gate transistor's conductivity during the programming process. The verify operation provides real-time feedback on programming status, allowing the system to determine when programming is complete without requiring repeated sequential cycles. This feedback mechanism enables concurrent execution of program and verify operations.
2Adaptability or versatility
If selection circuitry is used to select a bit cell, then bit cell selection capability is improved, but voltage drop becomes unpredictable and limits the application of higher program voltages
Solution Approach 1:
The patent introduces an intermediary voltage compensation mechanism that accounts for the unpredictable voltage drops in the selection circuitry. By monitoring the actual voltage at the floating gate transistor and adjusting the program voltage accordingly, the system compensates for IR drops in the selection circuitry, enabling higher program voltages to be applied safely while maintaining bit cell selection capability.
3Reliability
If a lower program voltage is used to avoid junction breakdown, then junction reliability is improved, but programming time increases due to longer duration requirement
Solution Approach 1:
The patent uses feedback from the verify operation to dynamically adjust the program voltage. By monitoring the floating gate transistor's conductivity in real-time, the system can safely apply higher program voltages when the transistor requires more programming, while reducing voltage when close to completion. This feedback-based voltage adjustment maintains junction reliability while minimizing programming time.
Solution Approach 2:
The patent makes the program voltage dynamic rather than static. The voltage is adjusted during the programming process based on real-time feedback from the verify operation and the transistor's conductivity state. This dynamic voltage adjustment allows the system to optimize programming speed while maintaining junction safety, eliminating the need to use consistently low voltages for the entire programming duration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces programming time, enhances reliability by eliminating junction breakdown risks, and enables more efficient hot carrier injection, while also allowing for tighter bit cell level distributions in multilevel implementations.
Implementation Method 1
The conductivity of the floating gate transistor, when enabled by the control gate, depends on the charge stored at the floating gate
Implementation Method 2
The HCI technique typically includes the application of program voltages at the drain electrode and the control gate of the floating gate transistor that are sufficient to drive electrons into the floating gate
Data Source
AI summary
A program voltage is applied to the drain electrode of a floating gate transistor to program the floating gate transistor. Concurrent with the application of the program voltage, a current based on the voltage at the source electrode of the floating gate transistor is compared with a threshold current to verify the programming of the floating gate transistor. When the bit cell current falls below the threshold current, the floating gate transistor is considered to be sufficiently programmed and the next floating gate transistor to be programmed is selected. Further, the program voltage supply emulates the selection circuitry used to select between the bit cells so as to model the voltage drop caused by the selection circuitry between the program voltage supply and the drain electrode of the floating gate transistor being programmed. The program voltage supply adjusts the output program voltage based on the modeled voltage drop.