Floating-Gate MOSFET Voltage Control Without Bootstrap Capacitors
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Solution Overview
Problem
Voltage control in applications like switched-capacitor converters is challenging due to high peak currents, excessive supply ringing, and localized power dissipation, leading to inefficiencies and potential electrical overstress, particularly in power MOSFETs, and often requires additional circuitry and external bootstrap capacitors, increasing cost and noise levels.
Innovation Solution
A closed-loop control scheme is implemented using pulse circuitry and feedback circuits to adjust the energy applied to a floating gate of a field effect transistor, allowing for precise control of the gate voltage swing independent of the gate driver supply voltage, eliminating the need for external bootstrap capacitors and optimizing efficiency by adjusting the on-time and gate charging current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external bootstrap capacitors are used to control gate voltage, then gate voltage control is achieved, but circuit board area increases and cost increases
Solution Approach 1:
The patent integrates the gate voltage control function directly into the gate driver circuit by merging the voltage regulation capability with the existing driver architecture. This eliminates the need for separate external bootstrap capacitors while maintaining effective gate voltage control, thereby reducing circuit board area and component count.
Solution Approach 2:
The gate driver circuit is designed to perform multiple functions: it provides both the gate drive signal and the gate voltage regulation functionality. The single supply voltage input is used to generate both the switching signals and the controlled gate voltage, making the circuit more universal and eliminating the need for dedicated bootstrap capacitors.
2Reliability
If external bootstrap capacitors are used to control gate voltage, then gate voltage control is achieved, but noise level increases
Solution Approach 1:
By merging the voltage control function into the gate driver circuit, the patent eliminates external bootstrap capacitors that are sources of electromagnetic interference and noise. The integrated approach reduces the number of external components and interconnections, thereby lowering the overall noise level and EMI emissions.
3Speed
If high peak currents flow through power MOSFET during switching, then switching speed is improved, but supply ringing occurs due to parasitic inductance
Solution Approach 1:
The patent implements a feedback mechanism that monitors the gate voltage and adjusts the drive signal accordingly. This feedback control prevents excessive peak currents by regulating the gate voltage swing, thereby reducing supply ringing caused by parasitic inductance while maintaining adequate switching speed through optimized pulse generation.
Solution Approach 2:
The gate driver circuit dynamically adjusts the gate voltage waveform to optimize switching performance. By controlling the rise and fall times of the gate voltage and limiting peak currents, the circuit achieves fast switching while minimizing supply ringing and electrical overstress conditions.
4Power
If maximum gate-to-source voltage and drain-to-source voltage occur concurrently, then switching capability is maximized, but electrical overstress damage occurs
Solution Approach 1:
The feedback-controlled gate driver monitors voltage conditions and dynamically adjusts the gate voltage waveform to prevent simultaneous occurrence of maximum gate-to-source voltage and drain-to-source voltage. This feedback mechanism limits peak stress conditions while maintaining effective switching capability through optimized pulse timing and amplitude control.
Solution Approach 2:
The circuit dynamically controls the gate voltage waveform to optimize switching performance while preventing overstress conditions. By adjusting the timing and amplitude of gate voltage pulses in real-time, the system achieves maximum switching capability without allowing concurrent peak voltages that would cause electrical overstress damage.
Data Source
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AI summary
Aspects of the present disclosure are directed to circuitry to control a gate voltage. As may be implemented in accordance with one or more embodiments, a voltage level is controlled for a field effect transistor (FET) having a floating gate and a target operating voltage above which the FET would be overcharged and around which the FET has a nominal operating range. Pulse circuitry is configured to apply energy to the floating gate in pulses, in operation the applied energy being pulsed low relative to the gate's target operating voltage, and then being changed by adjusting successive pulses until the gate reaches the target operating voltage. A feedback circuit samples a voltage level of, and enables the pulse circuitry to apply pulsed energy to, the floating gate for directing operation of the FET based on the target operating voltage in the nominal operating range.