Oxide Semiconductor Sequential Circuit With Floating-Node Data Retention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In semiconductor integrated circuits, power gating to reduce power consumption can lead to data loss in storage circuits, requiring additional arithmetic operations to restore data, thus increasing power consumption and delaying system operation.

Innovation Solution

Incorporating transistors with oxide semiconductor channels and capacitors to maintain node potential during power gating, ensuring data integrity without the need for additional arithmetic operations when power is restored.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power gating is applied to reduce power consumption, then power consumption is reduced, but data in storage circuits is erased

Engineering Contradiction:
Improvepower consumptionVSAvoiddata integrity
Core Design Contradiction:
Loss of energyVSLoss of information

Solution Approach 1:

Before power gating is activated, the node potential representing stored data is transferred to and held in a floating node by a capacitor. This preliminary action ensures data is preserved before power supply is interrupted, preventing data loss while enabling power consumption reduction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A capacitor is introduced as an intermediary element to store the node potential during power gating. The capacitor acts as a mediator between the storage circuit and the power supply, maintaining data integrity by holding the potential when power is removed, thus resolving the conflict between power reduction and data preservation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If power gating is applied to reduce power consumption, then power consumption is reduced, but additional arithmetic operations are required to restore data

Engineering Contradiction:
Improvepower consumptionVSAvoidoperation speed
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The data is preliminarily transferred to the floating node before power gating occurs. When power is restored, the data is already in place and only requires a simple restore operation rather than full arithmetic recalculation, thus maintaining productivity while reducing power consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit discards the need for complex arithmetic operations during power restore by having already preserved the essential data in the floating node. The recovery process is simplified to merely restoring power to the storage circuit, which automatically recovers the data state without requiring additional computational steps.

Inventive Principle:
Principle #34Discarding and recovering

3Loss of energy

If power gating is applied, then power consumption is reduced, but system operation is delayed until arithmetic operations complete

Engineering Contradiction:
Improvepower consumptionVSAvoidoperation delay
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

By performing the data preservation action preliminarily (transferring node potential to floating node before power gating), the system avoids the time-consuming arithmetic operations that would otherwise be required after power restore. This eliminates operation delays while maintaining the power consumption benefits of power gating.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces power consumption and operational delays by maintaining data integrity and eliminating the need for redundant arithmetic operations during power cycling.

Implementation Method 1

The oxide semiconductor has a band gap wider than silicon and an intrinsic carrier density lower than silicon

Methodology Applied
Scientific EffectWide band gap:

Implementation Method 2

The oxide semiconductor has a band gap wider than silicon and an intrinsic carrier density lower than silicon

Methodology Applied
Scientific EffectLow intrinsic carrier density:

Implementation Method 3

a capacitor whose one electrode is electrically connected to a node that is brought into a floating state when the transistor is turned off

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20250167769A1Semiconductor integrated circuit
Publication Date: 2025.05.22 SEMICON ENERGY LAB CO LTD
  • US20250167769A1 patent drawing
  • US20250167769A1 patent drawing
  • US20250167769A1 patent drawing

AI summary

Provided is a semiconductor device including a sequential circuit including a first transistor and a capacitor. The first transistor includes a semiconductor layer including indium, zinc, and oxygen to form a channel formation region. A node electrically connected to a source or a drain of the first transistor and a capacitor becomes a floating state when the first transistor turns off, so that a potential of the node can be maintained for a long period. A power-gating control circuit may be provided to control supply of power supply potential to the sequential circuit. The potential of the node still can be maintained while supply of the power supply potential is stopped.