Floating-Point Data Computation Circuit Segmentation
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Solution Overview
Problem
Current compute-in-memory (CIM) circuits face challenges in performing floating-point operations efficiently in terms of time, area, and power consumption, and often introduce quantization errors when converting floating-point data to fixed-point data.
Innovation Solution
A data computation circuit is designed to separate sign and mantissa bits from exponent bits, using a multiplier circuit to generate two's complement products, a summing circuit to add exponents, and a shifting circuit to align products based on sum differences, with an adder tree to produce partial sums, thereby performing floating-point computations with reduced time, area, and power without quantization errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If floating-point operations are performed in current CIM circuits, then computation accuracy is maintained, but time, area, and power consumption increase
Solution Approach 1:
The floating-point data is segmented into exponent bits and signed-mantissa bits, which are processed separately through dedicated circuit paths. The exponent bits go through a summing circuit while the signed-mantissa bits go through a multiplier circuit, allowing parallel processing that maintains accuracy while improving efficiency.
Solution Approach 2:
A shifting circuit acts as an intermediary component that receives the absolute difference between exponent sums and controls the shifting amount of mantissa products. This intermediary mechanism enables precise alignment of partial sums without quantization errors, resolving the contradiction between maintaining precision and improving computational efficiency.
2Speed
If floating-point data is converted to fixed-point data, then computation speed increases, but quantization errors are introduced
Solution Approach 1:
Instead of converting floating-point data to fixed-point data (the conventional approach), the patent inverts the approach by maintaining floating-point representation throughout the computation process. The circuit processes floating-point exponents and mantissas separately using dedicated circuits, achieving both high speed and high precision without quantization errors.
3Loss of time
If conventional computation circuits are used, then operation time is reduced, but area and power consumption increase
Solution Approach 1:
The computation circuit is segmented into specialized sub-circuits: a summing circuit for exponent bits, a multiplier circuit for signed-mantissa bits, and a shifting circuit for alignment. This segmentation allows each component to be optimized for its specific function, reducing overall circuit area while maintaining fast operation through parallel processing paths.
Data Source
AI summary
A circuit includes a multiplier circuit that receives a signed mantissa of each data element of pluralities of input and weight data elements and generates two's complement products by performing multiplication and reformatting operations on some or all of the input data element signed mantissas and some or all of the weight data element signed mantissas, a summing circuit that receives an exponent of each data element of the pluralities of input and weight data elements and generates sums by adding each input data element exponent to each weight data element exponent, a shifting circuit that shifts each product by an amount equal to a difference between a corresponding sum and a maximum sum, and an adder tree that generates a mantissa sum from the shifted products.