Computation Using Non-Contact Making Devices TRIZ Cases
- Softmax Computation Decomposition for Transformer Efficiency
Decomposes Softmax into UnNormalized and Normalization operations using reduced precision arithmetic to lower computational overhead in transformer inference.
- Chained DSP Blocks for Large Multiplier Implementation
Cascaded DSP blocks with carry-save adders form large multipliers, eliminating slow carry-propagate delays and preserving general-purpose logic resources.
- Mixed-Precision Matrix Multiplication Decomposition
Segments double-precision matrix multiplication into reduced-precision stages using dynamic scaling factors to recover numerical accuracy on AI accelerators.
- Matrix Operation Apparatus Reducing Data Transfer
A matrix operation apparatus uses nodes with accumulators to perform cumulative addition of element components from column and row inputs.
- Matrix Multiply-Add Unit Single Instruction Execution
A matrix multiply-add unit executes a single instruction to perform two-dimensional matrix operations.
- In-Memory Arithmetic Processors for One-Step Binary Operations
In-memory arithmetic processors perform one-step binary operations using two-dimensional memory arrays.
- Variable-Precision Matrix Multiplication via Digit Decomposition
Digit decomposition enables variable-precision computation across 2-bit to 64-bit ranges while reducing latency and wiring congestion in embedded systems.
- Multiplier Circuit Reusing Carry-Save Adder for Dot Products
A multiplier circuit reuses carry-save adder stages to process sub-products early.
- Shift-Round-Accumulate Circuit for Single-Cycle Data Processing
A shift-round-and-accumulate circuit executes data shifting, addition, and rounding in one processing cycle using shared adding hardware.
- Neural Network Operation Device Mixed Precision Controller
A neural network operation device maps input feature maps and weights to adder tree units for mixed precision processing.
- In-Memory Computing Circuit with Sense Amplifier for Data Comparison
An in-memory computing circuit uses a sense amplifier to compare voltages from memory cells directly within the storage structure.
- Daemon Proxy Setting Caching for Package Update Overhead
A daemon caches user proxy settings in a database keyed by session identifiers to eliminate repeated retrieval during package updates.
- Analog Crossbar Array for Complex Vector-Matrix Multiplication
A hardware crossbar array uses programmable complex-valued electrical admittances to perform multiply-accumulate operations on analog signals.
- Reciprocal Unit Using Lookup Tables and Newton-Raphson
A reciprocal unit uses lookup tables and a multiplier to compute estimated reciprocals with reduced hardware overhead.
- Idempotency Detection Circuitry for Arithmetic Operations
Circuitry detects idempotency in arithmetic operations by comparing result values with input operands to resolve finite precision accuracy issues.
- Constrained IBPG Cell Placement for IC Layout
Aligns local metal tracks with global tracks to eliminate dead spaces between in-boundary power-ground cells.