Machine Learning Post-OPC Verification for IC Layouts
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Solution Overview
Problem
The semiconductor industry faces challenges in efficiently verifying and correcting photomask designs for integrated circuit (IC) fabrication, particularly in nanometer technology nodes, where optical proximity correction (OPC) and post-OPC verification processes are complex and prone to errors, leading to defects and increased costs due to the need for accurate printing verification.
Innovation Solution
The implementation of machine learning techniques, specifically image-based machine learning, for post-OPC verification, which involves training models to identify and verify assist features in the corrected mask layout design, predicting print-out risks and defects, and matching features with a database to ensure accurate printing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional OPC verification methods are used, then manufacturing precision can be maintained, but productivity decreases due to complex and time-consuming verification processes
Solution Approach 1:
The patent replaces traditional rule-based and simulation-based OPC verification methods with a machine learning model. The ML model is trained on historical printing verification data and uses it to predict printing outcomes, substituting the mechanical/simulation-based verification process with an intelligent system that achieves both high accuracy and improved efficiency.
Solution Approach 2:
The machine learning model is trained in advance on comprehensive printing verification data, including assist feature patterns and printing outcomes. This preliminary training enables the model to quickly predict printing verification results without requiring time-consuming simulations during the actual verification process, thus improving productivity while maintaining precision.
2Manufacturing precision
If traditional OPC verification methods are used, then manufacturing precision can be maintained, but loss of time increases due to extended verification duration
Solution Approach 1:
The patent replaces traditional rule-based and simulation-based OPC verification methods with a machine learning model. The ML model is trained on historical printing verification data and uses it to predict printing outcomes, substituting the mechanical/simulation-based verification process with an intelligent system that achieves both high accuracy and improved efficiency.
Solution Approach 2:
The machine learning model creates a predictive copy of the printing verification process by learning from historical data. Instead of performing actual time-consuming simulations, the model uses learned patterns to predict outcomes, significantly reducing verification time while maintaining accuracy.
3Productivity
If machine learning techniques are implemented for post-OPC verification, then productivity increases and time loss decreases, but device complexity increases
Solution Approach 1:
The patent introduces a machine learning model as an intermediary between the OPC process and printing verification. The model is trained on historical data and serves as a mediator that predicts printing outcomes, simplifying the overall verification system architecture while improving efficiency and reducing the need for complex simulation infrastructure.
4Loss of time
If machine learning techniques are implemented for post-OPC verification, then loss of time decreases, but loss of information increases due to potential prediction errors
Solution Approach 1:
The machine learning model is trained on historical printing verification data that includes actual outcomes. This feedback from historical data allows the model to learn accurate patterns and improve its predictions. The continuous availability of training data enables the model to maintain high accuracy while providing fast verification.
Data Source
AI summary
Implementations of the disclosure provide a method of fabricating an integrated circuit (IC). The method includes receiving an IC design layout; performing optical proximity correction (OPC) process to the IC design layout to produce a corrected IC design layout; and verifying the corrected IC design layout using a machine learning algorithm. The post OPC verification includes using the machine learning algorithm to identify one or more features of the corrected IC design layout; comparing the one or more identified features to a database comprising a plurality of features; and verifying the corrected IC design layout based on labels in the database associated with the plurality of features.


