Floating Point Division via Binary Tree Inversion

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Solution Overview

Problem

Division operations on modern central processing units (CPUs) are inefficient, consuming significant CPU time, especially when performing multiple division steps in complex equations, which slows down processing.

Innovation Solution

A method and system that reduces CPU usage by inverting multiple floating-point denominator values using a binary tree structure, allowing for simultaneous division operations to be performed as a single step, thereby minimizing the number of division processes required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple division operations are performed sequentially using conventional methods, then each division can be completed individually, but the total processing time increases significantly

Engineering Contradiction:
Improveprocessing speedVSAvoidCPU time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent combines multiple division operations into a single division step by inverting all denominator values simultaneously using a binary tree approach. Instead of performing separate division operations for each numerator-denominator pair, the system inverts all denominators at once and then performs multiple multiplication operations, reducing the number of CPU division cycles required.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary inversion of all denominator values before performing the actual division operations. By using a binary tree structure to compute the product of all denominators and then inverting that product once, the system prepares all necessary inverse values in advance, allowing subsequent multiplications to complete the divisions without requiring additional division operations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple division operations are performed in complex equations, then the calculations can be completed, but the CPU usage increases significantly

Engineering Contradiction:
Improvecalculation throughputVSAvoidCPU usage
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple division operations into a unified computation process. By inverting all denominator values simultaneously using binary tree multiplication and then applying these inverted values to all numerators through multiplication, the system reduces CPU usage by minimizing the number of expensive division operations while maintaining calculation throughput.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If conventional division methods are used, then the implementation is simple, but the processing efficiency is low

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidalgorithm complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the division problem into two distinct phases: (1) inverting all denominator values simultaneously using a binary tree structure, and (2) multiplying the inverted denominators with the corresponding numerators. This segmentation allows the complex task of multiple divisions to be broken down into manageable steps that reduce overall processing time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential one-dimensional division operations to a two-dimensional approach using binary tree structures. The binary tree organizes the denominator inversion process in a hierarchical manner, allowing parallel computation of products and enabling simultaneous inversion of multiple denominators, thereby improving processing efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9311272B1System and method for faster division
Publication Date: 2016.04.12 GOOGLE LLC
  • US9311272B1 patent drawing
  • US9311272B1 patent drawing
  • US9311272B1 patent drawing

AI summary

A system and method for reducing central processing unit usage when inverting or dividing multiple floating point numbers is disclosed. An example system may receive a plurality of floating point numbers to be inverted as denominator values. The denominator values may be grouped into pairs and multiplied. Products of pairs may be multiplied to produce combinations of products of denominator values until all denominator values have been multiplied together. The product of all denominator values may be inverted using a single division. The combinations of products of denominator values from the multiplications achieved before the division may be multiplied with the inverted product from the division to compute inversions of all denominator values. In some embodiments, an example system may receive a plurality of floating point numbers as numerator values that each correspond to a denominator value. Numerator values may be multiplied with corresponding inversion denominator values to produce division results.