In-Memory Computing Circuit with Sense Amplifier for Data Comparison

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The performance bottleneck in computer systems is caused by the slower development of memory units compared to processing units, leading to inefficient data processing and high energy consumption due to frequent data transfer between the processor and memory, which is not effectively addressed by existing in-memory computing solutions.

Innovation Solution

An in-memory computing method and circuit that utilizes a plurality of memory cells and a sense amplifier to perform level state control and comparison operations, allowing data processing directly within the memory cells, thereby reducing the need for data transfer to the processor and enhancing processing speed and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is frequently transferred between processor and memory, then computing performance can be improved, but energy consumption increases and processing time is extended

Engineering Contradiction:
Improvecomputing performanceVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent combines memory storage function with computing function into a single integrated structure. Memory cells perform both data storage and comparison operations, eliminating the need for separate data transfer between processor and memory, thus reducing energy consumption while maintaining computing performance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sense amplifier acts as an intermediary that enables comparison operations directly within the memory structure. It receives signals from memory cells and performs comparison without requiring data to be moved to the processor, thereby reducing energy loss while preserving computing capability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If data is frequently transferred between processor and memory, then computing performance can be improved, but operation time is extended

Engineering Contradiction:
Improvecomputing performanceVSAvoidoperation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By merging storage and computing functions in the memory cells, the patent eliminates data transfer time between processor and memory. Comparison operations are performed directly on stored data within the memory structure, significantly reducing operation time while maintaining computing performance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Data is pre-loaded into memory cells where it remains stored and ready for immediate comparison operations. This preliminary positioning of data within the memory structure eliminates the need for subsequent data transfer to the processor, reducing operation time while preserving computing capability

Inventive Principle:
Principle #10Preliminary action

3Speed

If in-memory computing is implemented, then data processing speed is improved, but device complexity increases

Engineering Contradiction:
Improvedata processing speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The memory cells are designed to perform multiple functions: data storage and comparison operations. This multi-functionality enables in-memory computing capabilities while utilizing existing memory structure components, thereby improving data processing speed without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The sense amplifier serves as an intermediary component that enables comparison operations within the memory structure without requiring complex additional circuitry. It facilitates in-memory computing by processing signals from memory cells, thus improving data processing speed while minimizing the increase in device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230153067A1In-memory computing method and circuit, semiconductor memory, and memory structure
Publication Date: 2023.05.18 CHANGXIN MEMORY TECH INC
  • US20230153067A1 patent drawing
  • US20230153067A1 patent drawing
  • US20230153067A1 patent drawing

AI summary

An in-memory computing method is applied to the in-memory computing circuit. The in-memory computing circuit includes a plurality of first memory cells, a plurality of second memory cells, and a sense amplifier. Level state control is performed on the plurality of first memory cells according to first data to output a first voltage; level state control is performed on the plurality of second memory cells according to second data to output a second voltage; and after receiving a predetermined operation instruction, the sense amplifier receives the first voltage and the second voltage, compares the first voltage with the second voltage, and determines a comparison result of the first data and the second data according to a comparison result of the first voltage and the second voltage.