Floating-Point Conversion Circuit With Split-Path Shifting
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Solution Overview
Problem
Existing binary logic circuits for converting floating point numbers to fixed point numbers have critical paths that depend on exponent bias subtraction and mantissa negation, which can slow down the conversion process and complicate arithmetic operations.
Innovation Solution
A binary logic circuit with a split-path shifter that left-shifts or right-shifts the mantissa based on the exponent bits, eliminating the need for bias subtraction and mantissa negation, and includes a multiplexer to select the appropriate output based on the exponent's most significant bit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bias subtraction and mantissa negation are used in the conversion circuit, then the conversion can be performed accurately, but the critical path length increases and conversion speed decreases
Solution Approach 1:
The patent extracts and removes the bias subtraction operation from the critical conversion path. By using a split-path shifter that directly uses the exponent field value without subtracting the bias, the circuit eliminates a sequential operation that previously extended the critical path, thereby improving conversion speed while maintaining accuracy through alternative computational paths
Solution Approach 2:
The patent segments the shifter operation into two independent paths: one for normal exponent values and another for minimum exponent values. This segmentation allows parallel processing of different exponent cases, eliminating the need for sequential bias subtraction and negation operations, thus resolving the contradiction between accuracy and speed
2Measurement precision
If bias subtraction and mantissa negation operations are included, then complete floating point conversion is achieved, but the circuit complexity and arithmetic operation difficulty increase
Solution Approach 1:
The patent extracts and removes the mantissa negation operation from the conversion circuit. By using a split-path shifter that handles both positive and negative exponent cases through direct shifting operations rather than negation, the circuit significantly reduces the number of logical operations and components required, thereby reducing circuit complexity while maintaining complete conversion capability
Solution Approach 2:
Instead of using the conventional approach of subtracting bias and potentially negating the mantissa, the patent inverts the approach by using the exponent field value directly to control shift operations. This inversion eliminates multiple arithmetic operations and replaces them with simpler control logic, reducing overall circuit complexity
Data Source
AI summary
A binary logic circuit for converting a number in floating point format into a fixed point format. An inverting hardware circuit inverts bit values of an exponent. A shifter coupled to the inverting hardware circuit receives a significand input comprising a contiguous set of the most significant bits of the significand and right-shifts the significand input by a number of bits equal to the value represented by p least significant bits of the inverted exponent to generate a shifter output, wherein p is dependent on an integer width iw or a fractional width fw. A multiplexer coupled to the shifter receives an input comprising a contiguous set of bits of the shifter output, and outputs the input if the most significant bit of the exponent is equal to zero.