FMA Circuit Path Selection Using Operand Exponent Differences
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Solution Overview
Problem
Existing FMA circuits face issues with high power consumption, area overhead, and operation latency due to multiple adders and shifters, as well as complexity from multiple data paths and path selection overhead.
Innovation Solution
A fused multiply-add (FMA) circuit that includes a subtractor, multiplier, processor, and multiplexer to determine exponent differences and select operation results based on predetermined exponent ranges, using path circuits to optimize operations and reduce complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple adders and shifters are used to perform FMA operation, then operation correctness is improved, but power consumption increases and circuit area increases
Solution Approach 1:
The patent applies dynamics by making the data path configuration variable based on exponent difference ranges. The circuit dynamically switches between different path configurations (first data path for small exponent differences, second data path for large exponent differences) to optimize performance. This dynamic adaptation allows the circuit to use fewer adders and shifters for certain operations, reducing power consumption while maintaining correctness.
Solution Approach 2:
The patent segments the FMA operation into different paths based on exponent difference ranges. By dividing the operation space into segments (small exponent difference vs. large exponent difference), the circuit can select the most efficient path for each segment, avoiding the need for multiple adders and shifters to handle all cases simultaneously.
2Reliability
If multiple adders and shifters are used to perform FMA operation, then operation correctness is improved, but circuit area increases
Solution Approach 1:
The circuit dynamically reconfigures its data paths based on the exponent difference, switching between a first data path for small differences and a second data path for large differences. This dynamic reconfiguration enables the circuit to achieve correct FMA operations with reduced circuit area by not requiring all possible adders and shifters to be present simultaneously.
Solution Approach 2:
By segmenting the operation into different exponent difference ranges and providing specialized paths for each segment, the circuit reduces the overall area required. Instead of providing a complete set of adders and shifters for all possible operations, the segmented approach provides only the necessary components for each segment.
3Reliability
If multiple data paths are used in FMA circuit, then operation correctness for different exponent ranges is improved, but operation latency increases due to path selection overhead and synchronization complexity
Solution Approach 1:
The patent applies preliminary action by pre-determining the exponent difference and using it to select the appropriate data path before the actual addition operation. The path selection is based on pre-computed exponent range comparisons, which eliminates the need for complex real-time path selection overhead during the critical addition path.
4Reliability
If multiple data paths are used in FMA circuit, then operation correctness for different exponent ranges is improved, but path complexity increases
Solution Approach 1:
The patent segments the FMA operation into distinct exponent difference ranges and provides dedicated simple paths for each segment. The first data path handles small exponent differences with simple logic, while the second data path handles large exponent differences with different simple logic. This segmentation avoids the need for complex control logic to manage multiple paths.
Data Source
AI summary
A fused multiply-add (FMA) circuit includes a subtractor configured to determine an exponent difference between an exponent corresponding to multiplication of a first operand and a second operand and an exponent corresponding to a third operand, a multiplier configured to multiply a mantissa corresponding to the first operand and a mantissa corresponding to the second operand to generate mantissa multiplication result, a processor configured to generate a plurality of operation results from the mantissa multiplication result and a mantissa corresponding to the third operand, based on a plurality of path circuits respectively corresponding to a plurality of predetermined exponent ranges, and a multiplexer configured to output, as an FMA operation result, a first operation result selected from among the plurality of operation results in response to the exponent difference belonging to a first exponent range among the predetermined exponent ranges.