Folded Waveguide Inspection Circuit for Optical Chips
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Solution Overview
Problem
Existing inspection optical circuits for optical communication devices require significant space for the inspection circuit, limiting the design flexibility of optical circuit chips and increasing inspection costs due to time-consuming and costly measurements after chip separation.
Innovation Solution
The proposed inspection optical circuit integrates a grating coupler on the same optical circuit chip as the tested circuit and uses a folded waveguide connecting the input/output waveguide of the tested circuit and the grating coupler, formed in a region provided on a dicing line, thereby minimizing space requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate inspection optical circuit is disposed adjacent to the tested circuit, then inspection can be performed, but the space required for the inspection circuit limits design flexibility and increases complexity
Solution Approach 1:
The inspection optical circuit is merged with the tested circuit by forming both on the same optical circuit chip. The grating coupler for inspection is integrated onto the chip itself, and the folded waveguide utilizes the dicing line region to connect the inspection circuit with the tested circuit, eliminating the need for separate adjacent inspection circuits and thereby preserving design flexibility.
Solution Approach 2:
The folded waveguide extends into the third dimension by utilizing the dicing line region (a spatial dimension between chips), allowing the inspection circuit to be positioned on the same chip plane while maintaining optical connection without occupying additional lateral space that would constrain circuit design.
2Measurement precision
If measurement is performed for each chip after cutting out, then inspection accuracy is maintained, but inspection time and cost increase significantly
Solution Approach 1:
The inspection optical circuit is configured on the wafer-level chip structure before dicing, enabling inspection to be performed on multiple chips simultaneously in their mounted state. This preliminary arrangement of inspection infrastructure allows batch inspection before chip separation, dramatically reducing total inspection time while maintaining accuracy through the integrated grating coupler and folded waveguide connection.
3Adaptability or versatility
If inspection circuit space is minimized, then chip design freedom is improved, but optical coupling loss may increase
Solution Approach 1:
The folded waveguide employs curved waveguide paths with appropriate bending radii to navigate the optical connection between the grating coupler and tested circuit through the dicing line region. The curved geometry allows the waveguide to follow the folded path while maintaining low propagation loss, achieving both compact space utilization and efficient optical coupling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for efficient input and output of inspection light with low loss, enabling compact arrangement of the inspection optical circuit without limiting the circuit design, and reducing inspection costs by facilitating wafer-level inspection.
Implementation Method 1
an inspection optical circuit for inspecting a tested circuit formed on an optical circuit chip on a wafer by inputting and outputting light through a grating coupler
Implementation Method 2
a folded waveguide for connecting an input/output waveguide of the tested circuit and the grating coupler is formed in a region provided on a dicing line
Data Source
AI summary
The present invention is intended to provide an inspection optical circuit that can input and output inspection light to and from a circuit to be inspected with low loss, and can minimize a space for disposing the inspection optical circuit. Provided is an inspection optical circuit for inspecting a tested circuit formed on an optical circuit chip on a wafer by inputting and outputting light through a grating coupler, wherein the grating coupler is formed on the same optical circuit chip as the tested circuit, and a folded waveguide for connecting an input/output waveguide of the tested circuit and the grating coupler is formed in a region provided on a dicing line for cutting out the optical circuit chip.