Folding ADC Current-Source Sleep Control for Low-Power Accuracy
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Solution Overview
Problem
Folding analog-to-digital converters (ADCs) face challenges in achieving high accuracy and low power consumption due to the large number of current sources required, leading to increased power consumption and difficulties in integration.
Innovation Solution
A folding ADC design that includes a low power analog pre-processing unit with cascade-connected folding units, where current sources are driven into operation mode only when the voltage level of the analog input signal is greater than the reference voltage, and into sleep mode otherwise, reducing current consumption by selectively activating current sources based on the input signal level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large number of current sources are used in the folding circuit to achieve high accuracy in signal conversion, then the accuracy of conversion is improved, but the power consumption greatly increases
Solution Approach 1:
The patent implements dynamic control of current sources by introducing control signals that selectively activate or deactivate current sources based on the input signal characteristics. The folding circuit includes control logic that adjusts the number of active current sources in real-time, transforming a static high-power design into a dynamic low-power system that maintains accuracy only when necessary.
Solution Approach 2:
The patent changes the operational parameters of the folding circuit by varying the number of active current sources based on signal conditions. By modifying the activation state of current sources (from all active to selectively active), the circuit adapts its power consumption and accuracy characteristics to match the actual conversion requirements, resolving the contradiction between constant high accuracy and variable power consumption.
2Speed
If a large number of current sources are used in the folding circuit to achieve high speed conversion, then the conversion speed is improved, but the power consumption greatly increases
Solution Approach 1:
The patent applies dynamic control to balance speed and power consumption by activating additional current sources only when high-speed conversion is required. The control mechanism monitors conversion demands and adjusts current source activation accordingly, enabling the circuit to operate at high speed when necessary while consuming less power during normal operation.
Solution Approach 2:
The patent implements partial action by activating only the necessary number of current sources based on conversion requirements rather than keeping all current sources continuously active. This selective activation ensures sufficient conversion speed is achieved while avoiding the excessive power consumption that would result from always using the maximum number of current sources.
3Measurement precision
If more function blocks are added to the folding ADC to improve conversion accuracy, then the accuracy is improved, but the device complexity increases
Solution Approach 1:
The patent segments the folding circuit into multiple independent current source modules, each controlled by separate control signals. This segmentation allows the circuit to activate only the necessary number of segments based on conversion requirements, reducing the effective complexity while maintaining the capability for high accuracy when all segments are activated.
Solution Approach 2:
The patent designs the folding circuit with multi-functional current sources that can be selectively activated. Each current source serves multiple purposes: it contributes to both accuracy and speed when activated, and can be independently controlled to match the actual conversion demands, thereby reducing overall circuit complexity while maintaining high performance capabilities.
Data Source
AI summary
A folding analog-to-digital converter (ADC) is disclosed. The folding ADC includes a reference voltage generating unit generating a plurality of reference voltages, a low power analog pre-processing unit including a plurality of folders, each of which compares a voltage level of an analog input signal with a corresponding reference voltage of the plurality of reference voltages to generate a pair of differential folded outputs, a comparison unit that compares outputs of the low power analog pre-processing unit to output a digital signal, and an encoding unit that converts an output of the comparison unit into a binary code signal.