Forward Bulk-Biasing Circuit for Transistor Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional forward bulk-bias circuits increase leakage power dissipation due to continuous biasing during power-up and standby modes of ICs, nullifying the benefits of reduced supply voltage and processing speed, while also degrading performance.
Innovation Solution
A forward bulk-biasing circuit that selectively biases the bulk terminal of a transistor during transitions between power-up and standby modes, using a network of transistors and capacitors to increase threshold voltage only when necessary, thereby reducing leakage current and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If forward biasing is applied continuously to reduce threshold voltage and increase processing speed, then processing speed is improved, but leakage power dissipation increases exponentially during power-up and standby modes
Solution Approach 1:
The patent applies periodic action by using a clock signal to control the bulk biasing circuit, enabling forward biasing only during active operation modes and disabling it during power-up and standby modes. The clock signal periodically activates the bulk biasing transistors in sync with the circuit operation cycle, ensuring threshold voltage reduction occurs only when processing is active, thereby preventing exponential leakage current during idle periods while maintaining high processing speed during active periods
2Use of energy by moving object
If supply voltage is reduced to decrease power consumption, then power consumption is reduced, but processing speed degrades
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the threshold voltage of the transistor through controlled forward biasing of the bulk terminal. By changing the bulk-to-source voltage parameter during active operation, the transistor can achieve higher processing speed without requiring increased supply voltage. This allows the circuit to maintain low power consumption at reduced supply voltage while compensating for speed degradation through threshold voltage modulation during critical operation periods
3Productivity
If forward bulk-biasing circuit is implemented to improve performance, then processing speed increases, but leakage current increases exponentially during standby modes
Solution Approach 1:
The patent applies the taking out principle by extracting and isolating the bulk biasing function into a separate controllable circuit block that can be independently activated or deactivated. The bulk biasing transistors are designed as distinct components with separate control inputs, allowing the forward biasing effect to be removed during standby modes. This extraction enables the circuit to maintain high processing performance during operation while eliminating the harmful leakage current effect during idle periods by completely disconnecting the biasing function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces leakage power dissipation and maintains performance by increasing threshold voltage during transitions, allowing for potential reduction in supply voltage without degrading processing speed, thus optimizing power consumption.
Implementation Method 1
a capacitor having a first terminal connected to the drain and bulk terminals of the second and first transistors, respectively, and a second terminal connected to the gate terminal of the second transistor
Data Source
AI summary
Forward bulk biasing circuitry for PMOS and NMOS transistors is provided. The bulk biasing circuitry includes two N-type MOS transistors, two P-type MOS transistors, and two capacitors. The forward bias to a bulk terminal of a transistor increases a threshold voltage of a transistor, thereby reducing a transition time and improving the performance of the transistor. The forward bias is provided only when the transistor transitions from one state to another, thereby reducing leakage power dissipation during active and standby modes of an integrated circuit that includes the transistor.