Forward Divider Clock Generator for Wide-Range Frequency and Phase

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Solution Overview

Problem

Conventional voltage-controlled oscillators (VCOs) and phase-lock loops (PLLs) are limited in generating periodic signals over a wide range of frequencies, requiring complex and expensive solutions for applications needing varied frequency and phase signals.

Innovation Solution

A forward divider circuit with a divider chain and retimer circuits that adjust the frequency and phase of output clock signals by presetting divider circuits and using retimer signals to synchronize transitions, allowing for generation of signals over a wide frequency range and multiple phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single VCO is used to generate periodic signals, then the circuit is simple and uses little circuitry, but the frequency range is limited

Engineering Contradiction:
Improvecircuit complexityVSAvoidfrequency range
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The frequency range is segmented into multiple bands, with each VCO handling a specific frequency range. The system divides the overall frequency requirement into manageable segments that can be covered by individual VCOs operating at different center frequencies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple VCOs are used where each oscillator serves the universal function of generating periodic signals, but each is tuned to a different frequency range. This multi-functional approach allows the system to cover a wide overall frequency range while maintaining the simplicity of individual VCO circuits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a bank of VCOs is used to cover a wide frequency range, then the frequency coverage is improved, but the circuit becomes complex and expensive

Engineering Contradiction:
Improvefrequency rangeVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The frequency range is segmented into multiple bands, with each VCO handling a specific frequency range. The system divides the overall frequency requirement into manageable segments that can be covered by individual VCOs operating at different center frequencies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects which VCO to use based on the desired output frequency. A frequency detection circuit identifies the target frequency range and automatically activates the appropriate VCO, providing adaptive frequency coverage without requiring all VCOs to operate simultaneously.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If the frequency of a VCO is varied by changing the control voltage magnitude, then the frequency can be adjusted, but the adjustment range is limited

Engineering Contradiction:
Improvefrequency adjustabilityVSAvoidfrequency range
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

Multiple VCOs are used where each oscillator serves the universal function of generating periodic signals, but each is tuned to a different frequency range. This multi-functional approach allows the system to cover a wide overall frequency range while maintaining the simplicity of individual VCO circuits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system dynamically selects which VCO to use based on the desired output frequency. A frequency detection circuit identifies the target frequency range and automatically activates the appropriate VCO, providing adaptive frequency coverage without requiring all VCOs to operate simultaneously.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7536618B2Wide frequency range signal generator and method, and integrated circuit test system using same
Publication Date: 2009.05.19 MICRON TECHNOLOGY INC
  • US7536618B2 patent drawing
  • US7536618B2 patent drawing
  • US7536618B2 patent drawing

AI summary

A signal generator produces an output clock signal by coupling an input clock signal through a plurality of divider circuits each of which is formed by a toggling flip-flop. The frequency of the output clock signal is adjusted by selecting the flip-flop to which the input clock signal is coupled. Retimer flip-flops may be coupled between adjacent flip-flips to resynchronize the signal being coupled through the flip-flops. Each of the retimer flip-flops receives a respective signal from the output of an upstream flip-flop at its data input, and it receives the input clock signal at its clock input. The flip-flop then applies the signal to a downstream flip-flop in synchronism with the input clock signal. The final two flip-flops through which the input signal is coupled may be preset to various states to set the phase of the output clock signal to one of four phases.