FP8 Classification Instructions for ML Precision and Memory

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Solution Overview

Problem

Current technologies face challenges in efficiently processing 8-bit floating-point formats, particularly in machine learning applications, due to limitations in precision and range, which affect the accuracy and convergence of deep learning tasks.

Innovation Solution

The implementation of instructions for extracting exponents, mantissas, and classifying FP8 values, along with support for stochastic rounding, enables efficient processing and conversion between different floating-point formats, such as BF8 and HF8, to alleviate memory utilization and bandwidth issues while maintaining numerical accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If 8-bit floating-point format is used, then memory utilization and bandwidth are improved, but precision and range are reduced

Engineering Contradiction:
Improvememory utilizationVSAvoidprecision
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The floating-point number is segmented into distinct components (exponent and mantissa) that can be independently extracted and manipulated. The exponent field and mantissa field are separated using bitwise operations, allowing selective processing of each component to maintain precision where needed while optimizing memory usage overall.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the precision parameters by providing multiple FP8 format options with different exponent and mantissa bit allocations (e.g., 4 exponent bits + 3 mantissa bits, or 5 exponent bits + 2 mantissa bits). This allows the system to adjust precision and range parameters based on specific application requirements while maintaining 8-bit memory efficiency.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If 8-bit floating-point format is used, then memory bandwidth is improved, but range is reduced

Engineering Contradiction:
Improvememory bandwidthVSAvoidrange
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic format selection where the exponent and mantissa bit allocation can be adjusted based on the computational requirements. Different FP8 formats (e.g., E4M3, E5M2) can be dynamically chosen to optimize for either range or precision depending on the specific machine learning operation being performed.

Inventive Principle:
Principle #15Dynamics

3Productivity

If reduced precision arithmetic is used, then computational speed is improved, but accuracy is reduced

Engineering Contradiction:
Improvecomputational speedVSAvoidaccuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

By segmenting the floating-point representation into exponent and mantissa components, the patent enables selective extraction and processing of each part. This segmentation allows for optimized computational paths that maintain accuracy-critical operations while speeding up less sensitive computations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate extraction of exponent and mantissa values as separate entities before computation. These intermediates can be processed in optimized ways, with the mantissa potentially used for high-precision calculations while the exponent handles scaling, thereby maintaining accuracy while enabling faster computation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240045687A18-bit floating point classification and manipulation instructions
Publication Date: 2024.02.08 INTEL CORP
  • US20240045687A1 patent drawing
  • US20240045687A1 patent drawing
  • US20240045687A1 patent drawing

AI summary

Techniques for FP8 classification or manipulation using single instructions are described. An exemplary instruction includes fields for an opcode, an identification of a location of a packed data source operand, an indication of one or more classification checks to perform, and an identification of a packed data destination operand, wherein the opcode is to indicate that execution circuitry is to perform, for each data element position of the packed data source operand, a classification according to the indicated one or more classification checks and store a result of the classification in a corresponding data element position of the destination operand.