FPGA Backup Logic for Continuous ASIC Operation After Block Failure
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Solution Overview
Problem
Conventional semiconductor integrated circuit devices face challenges in continuing operation when failures occur during normal operation, as they require shutdown for self-testing and replacement, which can lead to performance deterioration and missed failures due to imperfect self-test functions and complex, costly manufacturing processes.
Innovation Solution
A semiconductor integrated circuit device configuration that includes a first large scale integrated circuit (ASIC) and a programmable second large scale integrated circuit (FPGA) connected through a simplified interface, allowing the FPGA to take over the functions of faulty logical blocks during operation, with a memory storing configuration data for the FPGA to replace faulty blocks without halting the ASIC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If self-test function is performed to detect failures, then reliability is improved, but productivity deteriorates because normal operation must be halted
Solution Approach 1:
The patent implements preliminary action by pre-configuring replacement logical blocks in the FPGA before failures occur. The FPGA is pre-programmed with backup logical block functions, and the switching mechanism is pre-established, allowing immediate replacement upon failure detection without halting operation. This resolves the contradiction by preparing all necessary components in advance so that failure detection and replacement can occur without interrupting productivity.
2Reliability
If frequent self-test is performed to detect age deterioration, then reliability is improved, but productivity deteriorates due to repeated operation halts
Solution Approach 1:
The patent applies continuity of useful action by enabling the FPGA to assume control of logical block functions during operation without requiring system halts. The switching mechanism allows seamless transition from ASIC to FPGA, maintaining continuous data transfer operations. This resolves the contradiction by making the useful action (data transfer) continuous even during failure detection and replacement scenarios.
3Manufacturing precision
If ASIC manufacturing processes are subdivided to enhance integration, then manufacturing precision is improved, but device complexity increases due to more connection interfaces
Solution Approach 1:
The patent applies universality by designing the FPGA to serve multiple functions: it can replace any faulty logical block in the ASIC, perform self-testing, and maintain system operation. The single FPGA unit universalizes the replacement capability across multiple logical blocks, reducing the need for dedicated replacement circuits for each block. This resolves the contradiction by consolidating multiple replacement functions into one multi-functional component, thereby reducing overall device complexity while maintaining high integration precision.
Data Source
AI summary
A semiconductor integrated circuit device includes: a first large scale integrated circuit including a plurality of first logical blocks; a programmable second large scale integrated circuit connected the first large scale integrated circuit and including a second logical block; a memory storing data for achieving the purposes of the first logical blocks; and a control unit that, when a failure is detected in any of the first logical blocks during the operation of the first large scale integrated circuit, writes the data for the faulty first logical block stored in the memory to the second logical block, and uses the second logical block in place of the faulty first logical block.