FPGA DSP Block MAC Circuitry With Direct Product Accumulation
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Solution Overview
Problem
Field-programmable gate arrays (FPGAs) with digital signal processing (DSP) blocks lack the capability to perform multiply-accumulate operations, requiring successive products to be accumulated in general-purpose programmable logic blocks, leading to slow operations and inefficient use of resources.
Innovation Solution
Enhancing DSP blocks with circuitry for direct connections and partial products addition, allowing successive products from one DSP block to be routed and accumulated in another, with added circuitry for overflow handling and dedicated interconnections to minimize resource usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If successive products are accumulated in general-purpose programmable logic blocks, then MAC operations can be performed, but operation speed becomes slow and resource utilization becomes inefficient
Solution Approach 1:
The patent segments the MAC operation into two distinct functional parts: multiplication (performed by DSP block 30) and accumulation (performed by DSP block 30b). By separating these functions into dedicated circuitry within DSP blocks rather than using general-purpose logic blocks, the system achieves both MAC operation capability and high-speed performance through optimized data paths and parallel processing structures.
Solution Approach 2:
The patent introduces dedicated interconnection resources (conductors 204, 252 and multiplexers 254) as intermediaries to directly connect DSP block 30 to DSP block 30b. These intermediary structures enable high-speed product transfer between blocks without using general-purpose interconnection resources, thereby maintaining both MAC functionality and operational speed efficiency.
2Adaptability or versatility
If successive products are accumulated in general-purpose programmable logic blocks, then MAC operations can be performed, but significant numbers of programmable logic blocks are consumed
Solution Approach 1:
The patent makes DSP blocks multi-functional by enhancing them with accumulation capability in addition to their native multiplication function. DSP block 30b can selectively perform either multiplication or accumulation based on control signals, allowing a single block type to serve multiple purposes. This eliminates the need for separate general-purpose logic blocks and reduces overall resource consumption while maintaining MAC operation capability.
3Adaptability or versatility
If products are routed from one DSP block to another for accumulation, then MAC operations can be performed, but significant amounts of interconnection resources are used
Solution Approach 1:
The patent adds a new dimension to the DSP block architecture by incorporating direct product output conductors (204) and feedback paths that bypass the general-purpose interconnection network. This creates a dedicated high-speed data path dimension for MAC operations, reducing reliance on the complex general-purpose routing infrastructure and minimizing interconnection resource usage.
Data Source
AI summary
In circuitry such as a programmable logic device (“PLD”), each of several multiplier blocks includes partial products generation circuitry and partial products addition circuitry. Two such multiplier blocks can be used together to provide multiply-accumulate (“MAC”) capability. The partial products addition circuitry in one of the paired blocks is used to add each successive product produced by the other paired block to a previous accumulation of products in the first-mentioned paired block. Provisions are also made for accumulating any overflow from operation of the partial products addition circuitry in the first-mentioned paired block.