FPGA Error Recovery Using Data Replay and Channel Reconfiguration
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Solution Overview
Problem
Reconfigurable digital integrated circuits, such as FPGAs, face challenges in protecting against reversible errors induced by radiation, which can lead to logic errors and configuration memory issues, particularly in aerospace and complex ground systems, with existing solutions causing service interruptions and increased consumption.
Innovation Solution
A method involving a configuration memory protection mechanism that includes error detection units, self-test mechanisms, and data replay mechanisms to detect and correct errors without service interruption, utilizing parallel processing channels and redundant components to maintain circuit functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant memory insensitive to radiation (e.g., reference ROM memory) is used for correcting errors on configuration memory, then reliability is improved, but device complexity and loss of time due to service interruption increase
Solution Approach 1:
The system uses self-diagnosis through error detection units that automatically identify errors in processing channels without external intervention. The reconfiguration is triggered and executed automatically based on error detection, making the system self-correcting and reducing the need for complex external protection mechanisms.
Solution Approach 2:
The system dynamically reconfigures only the affected processing channels based on real-time error detection, rather than using static redundant memory. This dynamic approach allows the system to adapt to errors as they occur, maintaining reliability while reducing complexity compared to always-active redundant systems.
2Reliability
If periodic reprogramming of configuration memory is performed for preventive correction, then reliability is improved, but loss of time and productivity decrease
Solution Approach 1:
Instead of continuous or periodic reprogramming, the system uses periodic error detection through error detection units that monitor processing channels. Reconfiguration occurs only when errors are detected, transforming continuous preventive action into event-driven corrective action, thus maintaining reliability without constant productivity loss.
Solution Approach 2:
The system extracts and isolates only the affected processing channels for reconfiguration, rather than reprogramming the entire configuration memory periodically. This selective approach minimizes the impact on productivity while maintaining reliability by correcting only what is necessary.
3Reliability
If error-correcting codes or error-detecting codes are used for protection, then reliability is improved, but device complexity and use of energy increase
Solution Approach 1:
The system creates a copy of the affected processing channel's configuration and reconfigures the original channel based on this copy, avoiding the need for complex error-correcting codes. This copying approach provides error correction functionality with lower energy consumption and reduced complexity compared to implementing full error-correcting code schemes.
4Reliability
If protection mechanism is added to mask impact of reversible errors, then reliability is improved, but device complexity and processing speed impact increase
Solution Approach 1:
The error protection mechanism applies reconfiguration only to the specific processing channels where errors are detected, rather than applying a global protection mechanism to the entire system. This localized approach minimizes the impact on overall processing speed while maintaining reliability in the affected areas.
Data Source
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AI summary
A method for protecting a reconfigurable digital integrated circuit comprising several parallel processing channels, each comprising an instance of a functional logic block and an error detection unit, the method comprising the successive steps of: o Enabling (501) the error detection unit to detect an error in at least one processing channel, o executing (502) the data replay mechanism, then o Enabling (503) the error detection unit to detect an error in at least one processing channel, o If an error is again detected, executing (504) a self-test on each processing channel, o For each processing channel, ▪ If the self-test does not detect any error, execute the data replay mechanism for that processing channel, ▪ If the self-test detects an error, reconfigure the portion of the configuration memory associated with that processing channel.