FPGA IP Block Activation Using Stored Keys to Prevent Unauthorized Use
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Solution Overview
Problem
Field Programmable Gate Arrays (FPGAs) lack effective protection mechanisms for Intellectual Property (IP) blocks, making it difficult for manufacturers to prevent unauthorized use and monetize their proprietary designs.
Innovation Solution
An Integrated Circuit (IC) with an IP protection feature that includes a memory array to store binary keys, which are used to activate and enable IP blocks, ensuring only authorized users can access and utilize the IP blocks by transferring the keys from the memory array to the IP blocks through interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If FPGAs are made flexible to insert any type of soft IP blocks, then adaptability is improved, but security against unauthorized use deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-loading encryption keys into the FPGA device during manufacturing or configuration, before the IP blocks are activated. The keys are stored in secure memory locations and automatically provided to authorized IP blocks when needed, establishing protection in advance before any potential unauthorized access can occur.
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of an encryption key management system that acts as a mediator between the IP blocks and the FPGA resources. The keys serve as intermediaries that enable authorized IP blocks to access required resources while preventing unauthorized access, thus resolving the conflict between flexibility and security.
2Object-affected harmful factors
If encryption keys are stored in the FPGA to protect IP blocks, then security is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by designing a key management system that automatically handles key distribution and validation without requiring external intervention. The FPGA internally manages the encryption keys, automatically providing them to authorized IP blocks and rejecting unauthorized access attempts, thereby reducing the operational complexity despite the added security infrastructure.
Solution Approach 2:
The patent merges the key storage and key distribution functions into the existing FPGA architecture, integrating security mechanisms with the programmable logic fabric. By combining security functions with the existing configuration and interconnection structures, the patent reduces overall system complexity while maintaining robust protection.
Data Source
AI summary
An integrated circuit (IC) with an Intellectual Property (IP) protection system is disclosed. The IC includes a memory array operable to store a key. The key is a sequence of binary bits. The IC also has an IP block operable to perform a function. The IP block is defined through the circuitry of the IC. The IP block is also operable to be activated with the key. The IC has an interconnection operable to couple the memory array to the IP block. The interconnection transfers the key from the memory array to the IP block. A method to configure and to operate the IC is also provided.