FPGA Resampling of OCT Signals Using Low-Frequency K-Clock

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Solution Overview

Problem

Swept Source Laser systems in Optical Coherence Tomography face challenges in generating high-speed clock signals for compensating non-linearities, especially at deeper depths, where fringe patterns degrade beyond the coherence length, requiring high-frequency K-Clock signals that are difficult to generate and maintain.

Innovation Solution

Implementing a signal processing system on a Field Programmable Gate Array (FPGA) that uses a low-frequency K-Clock for resampling OCT signals, eliminating the need for high-frequency clock signals by oversampling and interpolating the OCT signal in real-time, allowing for efficient processing and reducing hardware requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If a high-frequency K-Clock signal is used to compensate for non-linearities at deeper depths, then imaging depth is improved, but the difficulty of generating and maintaining the clock signal increases

Engineering Contradiction:

Improveimaging depthVSAvoidclock signal generation complexity

Core Design Contradiction:

Length of moving objectVSDevice complexity

Solution Approach 1:

The patent changes the frequency parameter of the K-Clock signal from high-frequency to low-frequency operation. By using a low-frequency clock signal (e.g., 1 kHz) instead of a high-frequency one, the system achieves deeper axial imaging while eliminating the complexity of generating and maintaining high-frequency clock signals. The resampling algorithm compensates for the lower frequency by performing multiple sampling points per period.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary resampling of the OCT signal using a low-frequency K-Clock before final processing. By pre-resampling the signal at multiple points during each low-frequency period, the system prepares the data in advance to achieve high-frequency equivalent performance without requiring actual high-frequency clock signals.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If a high-frequency K-Clock is used for resampling, then signal acquisition speed is improved, but hardware requirements and latency increase

Engineering Contradiction:

Improvesignal acquisition speedVSAvoidhardware requirements

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent changes the operational frequency parameter from high-frequency to low-frequency K-Clock. This parameter change reduces hardware requirements and latency while maintaining signal acquisition speed through the resampling algorithm that processes multiple points within each low-frequency period.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/electrical high-frequency clock generation system with a software-based resampling algorithm running on an FPGA. This substitution eliminates the need for complex high-frequency clock generation hardware while achieving equivalent or superior signal acquisition performance through digital signal processing.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Loss of time

If traditional high-frequency clock-based systems are used, then real-time processing capability is maintained, but additional hardware is required

Engineering Contradiction:

Improveprocessing latencyVSAvoidadditional hardware requirements

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The patent replaces traditional high-frequency hardware clock-based real-time processing with an FPGA-based software resampling system. This substitution eliminates the need for additional high-frequency clock generation hardware while maintaining real-time processing capability through efficient digital signal processing on the FPGA.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent makes the FPGA platform universal by implementing a multi-functional resampling algorithm that can handle various imaging depths and conditions. The single FPGA-based system performs both the low-frequency clock generation and the complex resampling operations, eliminating the need for separate dedicated hardware components.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS9285208B2Real-time resampling of optical coherence tomography signals using a field programmable gate array

Publication Date: 2016.03.15 NATIONAL INSTRUMENTS CORP

AI summary

A signal processing system implemented on a Field Programmable Gate Array (FPGA) operates according to a low frequency K-Clock to sample Optical Coherence Topography (OCT) signals, as opposed to relying on a high frequency K-Clock to obtain the same information. A resampler is used to resample the OCT signal uniformly in the optical frequency domain. The resampling may be performed by extracting instantaneous phase information from a low-frequency digitized K-Clock signal, unwrapping the extracted phase information, multiplying the unwrapped extracted phase information with an interpolation factor to obtain recalculated phase information, determining one or more integer crossing points corresponding to the recalculated phase information, and interpolating one or more values of the OCT signal based on the one or more integer crossing points. The integer crossing points may represent points in phase divisible by 360 degrees, within the range of points in phase defined by the recalculated phase information.