FPGA Power Delivery Network Impedance Characterization In Situ
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Solution Overview
Problem
The design of Power Delivery Networks (PDN) in Field Programmable Gate Arrays (FPGAs) faces challenges due to unpredictable load current profiles, leading to voltage fluctuations and potential damage from under-voltage or over-voltage conditions, exacerbated by component variations and manufacturing imperfections, which current simulation tools struggle to accurately predict and account for.
Innovation Solution
A method and system for self-characterization of PDN impedance using a Carry-Chain Analog-to-Digital Converter (CC-ADC) and Delay Line Analog-to-Digital Converter (DL-ADC) to measure DC and AC impedance, respectively, allowing for in-situ calibration and identification of voltage ripples, enabling improved PCB design and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If current simulation tools are used to predict PDN impedance, then design time is reduced, but measurement precision and reliability are insufficient due to inability to account for component variations and manufacturing imperfections
Solution Approach 1:
The patent performs PDN impedance characterization during the manufacturing process itself, before the product is deployed. By integrating measurement circuits (ADCs, current sources) into the FPGA and performing measurements during production testing, the system captures actual impedance characteristics including all manufacturing variations, rather than relying on pre-computed simulations that cannot account for real-world deviations.
Solution Approach 2:
The FPGA device performs its own PDN impedance characterization using integrated measurement circuits. The device self-measures its own impedance characteristics through built-in ADCs and test current sources, eliminating the need for external specialized equipment and providing accurate, device-specific impedance data that reflects actual manufacturing variations.
2Reliability
If comprehensive PDN characterization is performed across multiple frequencies, then system reliability is improved, but measurement time and complexity increase
Solution Approach 1:
The patent measures PDN impedance at multiple discrete frequency points across the operating range. By periodically sweeping through different test frequencies and measuring impedance at each point, the system builds a comprehensive impedance profile that captures resonant peaks and anti-resonant valleys, enabling reliable prediction of voltage fluctuations under various operating conditions without requiring continuous measurement.
Data Source
AI summary
Modern FPGAs operate at a core voltage around 1V and therefore even small voltage fluctuations can lead to timing violations and logic errors. The Power Delivery Network (PDN) between a power supply and the FPGA core must be carefully designed to achieve a low output impedance over a broad range of frequencies. The present disclosure describes two techniques for characterization of the PDN: 1) to extract the DC resistance in the power delivery path, and 2) to identify the high impedance frequency band(s) in the PDN. An embedded impedance extraction tool is synthesized within the FPGA load, in coordination with a mixed-signal current-mode dc-dc converter. A self-calibrated Carry-Chain based ADC (CC-ADC) is used for high-speed sampling of the core voltage. By modifying the PDN based on the extracted results, the voltage operating range and reliability of a crossbar application may be greatly extended.