FPGA Generic Solver Reconfiguration for Real-Time Simulation
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Solution Overview
Problem
Traditional simulation methods, especially in real-time applications, face challenges in efficiently modeling and testing systems due to the complexity of text-based programming environments and the need for extensive reconfiguration of simulation logic when switching between different system models.
Innovation Solution
A system utilizing a programmable hardware element, such as an FPGA, configured with generic simulation logic and modular system models, allowing for rapid reconfiguration and execution of simulations across various system models without requiring extensive changes to the simulation logic, enabling fast and efficient real-time simulations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If traditional text-based programming environments are used for system simulation, then programming flexibility and control are achieved, but programming complexity and development time increase significantly
Solution Approach 1:
The patent replaces text-based programming environments with a graphical programming environment where users can create simulations by visually assembling blocks representing system components, mathematical operations, and control logic. This substitution eliminates the need for writing and debugging text code, significantly reducing programming complexity and development time while maintaining full functionality for system simulation and measurement/control logic testing.
2Adaptability or versatility
If software-based simulation is used, then flexibility in modifying simulation logic is achieved, but execution speed and real-time performance deteriorate
Solution Approach 1:
The patent substitutes software-based simulation execution with hardware-based execution using an FPGA (Field-Programmable Gate Array). The graphical program is compiled into hardware logic that executes parallel operations at hardware speeds, achieving real-time performance. The FPGA's reconfigurable nature maintains flexibility, allowing the simulation logic to be modified by loading new graphical programs without sacrificing execution speed.
Solution Approach 2:
The patent implements dynamic reconfigurability by allowing the FPGA to be programmed with different graphical programs at runtime. The system can switch between different simulation models and measurement/control logic prototypes by loading new compiled hardware descriptions, enabling both real-time execution and adaptive flexibility through hot-swapping of simulation configurations.
3Manufacturing precision
If extensive programming skills are required for system simulation, then precise control and customization are achieved, but ease of use and accessibility deteriorate
Solution Approach 1:
The patent replaces text-based programming with a graphical block-diagram environment where system simulations are constructed by visually connecting blocks representing mathematical operations, system components, and control logic. This graphical approach maintains precise control over simulation parameters and logic while eliminating the need for programming skills, making the tool accessible to engineers and scientists without computer science backgrounds.
Solution Approach 2:
The patent segments the simulation system into discrete, reusable blocks that represent fundamental operations (mathematical functions, system components, signal processing operations). Users can precisely control complex simulations by assembling and configuring these modular blocks through visual connections, maintaining fine-grained control while simplifying the interface to an intuitive drag-and-drop paradigm that requires no programming knowledge.
Data Source
AI summary
A method for performing a simulation of a system. The system includes an FPGA that is configured to implement simulation logic, such as a generic solver. For example, the FPGA device may implement a generic time domain solver or a generic frequency domain solver. The FPGA device is also configured with information representing a system model of the system under simulation. The system also includes input hardware for providing input signals for the simulation to the FPGA device and output hardware for receiving output signals computed by the simulation from the FPGA device. The system may be reconfigured to simulate different systems by changing the system model, without requiring the simulation logic (e.g., the generic solver) to be changed.