Fractional Tap Unrolling Decision Feedback Equalizer
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Solution Overview
Problem
High-speed digital communication systems face challenges in implementing decision feedback equalizers due to the exponential growth in size and power consumption of unrolled architectures, particularly at symbol rates approaching or exceeding 10 GHz, which makes it difficult to effectively combat inter-symbol interference (ISI) and noise without amplifying noise further.
Innovation Solution
The implementation of decision feedback equalizers employing fractional tap unrolling and probability-based decision threshold placement, which includes a register, precompensation unit, multiplexer, and level finder, allows for efficient tracking of preceding symbol decisions and adjustment of symbol decision thresholds to minimize ISI and noise amplification, using comparators with different thresholds to account for varying numbers of speculative preceding symbols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If unrolled DFE architectures are implemented to combat ISI at high symbol rates, then ISI reduction capability is improved, but device size and power consumption grow exponentially
Solution Approach 1:
The patent applies partial unrolling by implementing only a subset of the full unrolled DFE architecture. Specifically, it uses a combination of unrolled stages and a feedback path, rather than fully unrolling all stages. This partial approach reduces the exponential growth in device size while maintaining adequate ISI reduction capability for high-speed operation.
Solution Approach 2:
The equalizer is segmented into multiple functional blocks including unrolled stages, feedback paths, and selective combining logic. This segmentation allows the system to distribute the ISI cancellation function across multiple manageable units rather than requiring a single large unrolled structure, thereby reducing overall device complexity.
2Reliability
If unrolled DFE architectures are implemented to combat ISI at high symbol rates, then ISI reduction capability is improved, but power consumption increases
Solution Approach 1:
By implementing partial unrolling rather than full unrolling, the patent reduces the number of active computational elements and their associated power consumption. The feedback path allows certain computations to be performed more efficiently, reducing overall power requirements while maintaining ISI reduction effectiveness.
Solution Approach 2:
Different stages of the equalizer use different architectures optimized for their specific functions. The unrolled stages provide aggressive ISI cancellation where needed, while feedback paths handle residual interference, allowing each section to operate at optimal power efficiency for its specific task.
3Reliability
If feedback paths are implemented in DFE to remove ISI effects, then ISI reduction is improved, but implementation becomes infeasible at symbol rates approaching or exceeding 10 GHz in silicon-based integrated circuits
Solution Approach 1:
The unrolled stages perform preliminary ISI cancellation before the signal reaches the feedback path. This pre-processing reduces the burden on the feedback path, allowing it to operate effectively at higher symbol rates without requiring excessive computation time that would be incompatible with 10 GHz and above operations.
Solution Approach 2:
The feedback path is segmented and integrated with unrolled stages, creating a hybrid architecture where different processing methods operate in parallel. This segmentation allows the system to meet the tight timing requirements of high-speed operation by distributing the ISI cancellation function across multiple pathways with different latency characteristics.
Data Source
AI summary
Decision feedback equalizers and equalization methods may employ fractional tap unrolling and/or probability-based decision threshold placement. One illustrative fractional tap unrolling equalization method embodiment includes: tracking preceding symbol decisions; converting an equalized signal into tentative symbol decisions with a precompensation unit; and selecting from the tentative symbol decisions based on the preceding symbol decisions. The precompensation unit has a decision element for each combination of a first number of speculative preceding symbols, with comparators in each decision element using a first type of symbol decision threshold that accounts for trailing intersymbol interference from the corresponding combination, and with an additional comparator in at least one of the decision elements using a second type of symbol decision threshold that accounts for trailing intersymbol interference from a second number of speculative preceding symbols, the second number being greater than the first.