Frame Mask for Plasma Wafer Dicing
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Solution Overview
Problem
Conventional semiconductor wafer dicing techniques, such as mechanical sawing, are time-consuming and prone to causing vibrations that can lead to cracking, while plasma dicing requires costly and time-consuming pre and post-processing steps like laser etching for mask formation and removal.
Innovation Solution
The use of frame masks in plasma dicing, which include a mask frame with suspended segments to define dicing channels, allowing for plasma etching without the need for pre and post-processing, and enabling reusable designs that reduce cycle time and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If mechanical sawing is used for dicing, then the wafer can be separated into individual dies, but the process is time-consuming and causes vibration leading to cracks
Solution Approach 1:
The patent replaces the mechanical sawing system with a plasma-based system. Instead of using a physical saw blade that contacts and cuts the wafer mechanically, the invention uses plasma etching to remove material and create dicing channels. This substitution eliminates mechanical vibration and contact forces that cause die cracking, while significantly improving dicing throughput through parallel processing of multiple channels simultaneously.
2Productivity
If plasma dicing is used, then throughput is improved and vibration issues are avoided, but pre and post-processing steps like laser etching for mask formation are required which are costly and time-consuming
Solution Approach 1:
The patent extracts and removes the complex pre-processing and post-processing steps from the plasma dicing workflow. Instead of requiring laser etching for mask formation and subsequent mask removal steps, the invention uses a simple frame mask structure that can be directly placed on the wafer before plasma etching and easily removed afterward. This extraction of unnecessary steps simplifies the overall process while maintaining high throughput.
Solution Approach 2:
The patent changes the physical parameters and properties of the masking approach. Instead of using complex laser-etched masks that require multiple processing steps, the invention employs a frame mask with specific geometric parameters (openings aligned with dicing lines) that enables direct plasma etching. This parameter change in the masking approach eliminates the need for intermediate laser etching steps and mask removal processes.
3Manufacturing precision
If conventional mask formation with laser etching is used, then plasma dicing can be performed, but the process is time-consuming due to individual laser cuts in x and y directions
Solution Approach 1:
The patent applies preliminary action by pre-configuring the frame mask with openings already positioned and oriented to match the required dicing lines on the wafer. Instead of forming the mask pattern through time-consuming laser cuts during the processing sequence, the mask is prepared in advance with the correct geometric configuration, allowing direct plasma etching to proceed immediately without intermediate patterning steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the efficiency and cost-effectiveness of plasma dicing by eliminating the need for pre and post-processing steps, reducing cycle time, and producing high-throughput, smooth, and straight-sided dies with minimal cracking risks.
Implementation Method 1
performing plasma dicing of the wafer in the plasma chamber
Implementation Method 2
the wafer on the wafer ring frame assembly is fixed to an electrostatic chuck in the plasma chamber
Data Source
AI summary
The present disclosure relates to plasma dicing of wafer. More specifically, the present disclosure is directed to frame masks and methods for plasma dicing wafers utilizing frame masks. The frame mask includes a mask frame, wherein the mask frame includes a top ring mask support and a side ring mask support. A plurality of mask segments suspended from the top ring mask support by segment supports, the mask segments are configured to define dicing channels on a blank wafer. The frame mask is configured to removably sit onto a frame lift assembly in a plasma chamber of a plasma dicing tool, when fitted onto the frame lift assembly, the mask segments are disposed above a wafer on a wafer ring frame for plasma dicing. The mask frame is configured to enable flow of plasma therethrough to the wafer to etch the wafer to form dicing channels defined by the mask segments.