Free-Running Time-to-Digital Conversion for Better Linearity
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Solution Overview
Problem
Time-to-digital conversion circuitry faces linearity deterioration due to variations in delay characteristics of delay elements, particularly when the phase of the start signal and phase signals output from the VCO synchronize, making it difficult to enhance linearity without independent clock systems.
Innovation Solution
The circuitry includes oscillation circuitry performing free-running oscillation with phase signals that do not synchronize with the start and stop time points, phase sampling circuits, and a PLL to control oscillation frequency, allowing the clock to be shared with the system while maintaining asynchronous phases, thus applying the Cyclic Sliding Scale Technique to mitigate linearity issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the phase of the start signal and phase signals output from the VCO synchronize, then the clock system can be simplified, but linearity deteriorates due to variations in delay characteristics of delay elements
Solution Approach 1:
The patent applies dynamics by making the oscillation circuitry operate in a free-running mode where the phase relationship between the VCO output and start/stop signals continuously varies over time rather than being fixed. This dynamic phase relationship ensures that synchronous conditions (which cause linearity deterioration) occur only briefly and are averaged out over the measurement period, allowing both simplified clock system and acceptable linearity
2Ease of operation
If the oscillation circuitry is turned ON and OFF in synchronization with start and stop signals, then the circuit operation can be synchronized with the system clock, but noise is generated from the ON/OFF operations and temporal resolution is degraded
Solution Approach 1:
The patent implements continuity of useful action by keeping the oscillation circuitry constantly ON rather than switching it ON and OFF with each measurement cycle. The VCO continuously generates phase signals, and the measurement logic selectively samples these signals based on start/stop events. This continuous operation eliminates switching noise, maintains stable frequency characteristics, and preserves temporal resolution while still allowing synchronization with the system clock through the measurement control logic
Data Source
AI summary
Time-to-digital conversion circuitry converts a time between a start time point and a stop time point, which are state-change time points of digital signals, into digital. The time-to-digital conversion circuitry comprises oscillation circuitry that outputs a plurality of phase signals having different phases, and outputs a digital value of the time based on the plurality of phase signals. The oscillation circuitry performs free-running oscillation and outputs the phase signals that do not synchronize with the start time point and the stop time point.