Frequency Estimation Circuit With Harmonic-Suppressing Waveform Generation
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Solution Overview
Problem
Conventional methods for monitoring VCO frequency in FMCW automotive radar systems require complex high-order analogue filters to suppress harmonics, which are costly and difficult to implement in CMOS technology due to noise, bandwidth, and linearity performance penalties.
Innovation Solution
A frequency estimation signal generator component that uses a counter component to generate a sequence of control signal patterns, a continuous waveform generator to produce a sinusoidal output, and a low-order filter to derive a frequency estimation signal, significantly reducing the need for complex filtering by suppressing harmonics through a mixed-signal approach.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional clock divider is used to monitor VCO frequency, then the frequency can be scaled down to a measurable range, but the output waveform becomes a square wave with strong harmonic tones that require complex filtering
Solution Approach 1:
The patent extracts only the fundamental frequency component from the divided signal while eliminating harmonics through a specialized frequency-to-voltage converter circuit. This converter uses a resonant tank circuit tuned to the fundamental frequency, which naturally rejects harmonic components, thereby obtaining a clean sinusoidal output without requiring complex digital or analog filtering stages.
Solution Approach 2:
The patent replaces complex electronic filtering systems with a resonant tank circuit-based frequency-to-voltage converter. This analog resonance-based approach substitutes for what would otherwise require high-order digital signal processing or complex multi-stage analog filters, achieving harmonic suppression through the natural frequency-selective properties of the resonant circuit.
2Measurement precision
If a high-order analogue filter is used to suppress harmonics, then frequency estimation accuracy is improved, but the filter becomes difficult and costly to implement in CMOS technology due to noise, bandwidth and linearity performance penalties
Solution Approach 1:
The patent replaces complex high-order CMOS analog filters with a resonant tank circuit frequency-to-voltage converter that achieves harmonic suppression through resonance. This approach avoids the noise, bandwidth, and linearity performance penalties associated with high-order CMOS filtering while maintaining frequency estimation accuracy, making the solution much more feasible for standard CMOS manufacturing processes.
Solution Approach 2:
The patent changes the approach from filtering in the time domain to frequency-selective conversion using resonant parameters. By tuning the resonant tank circuit to the fundamental frequency, the system achieves selective harmonic suppression through parameter optimization rather than through complex filter topology, thereby improving manufacturability in CMOS technology.
3Measurement precision
If complex filtering is implemented on a separate chip with dedicated technology, then harmonic suppression performance is achieved, but power consumption and area increase significantly
Solution Approach 1:
The patent merges the frequency division, harmonic suppression, and frequency-to-voltage conversion functions into a single integrated circuit block. By combining these functions that would traditionally require separate chips or dedicated hardware, the solution achieves the same harmonic suppression performance with significantly reduced power consumption and area, as all components share the same substrate and can be optimized for minimal power operation.
Solution Approach 2:
The patent uses a simplified resonant tank circuit model to achieve the frequency conversion function, effectively creating a lightweight analog copy of the signal processing function that avoids the power-intensive digital filtering approaches. This analog resonance-based copying of the frequency selection function achieves harmonic suppression with much lower power consumption than equivalent digital or complex analog filtering systems.
4Measurement precision
If complex filtering is implemented on a separate chip with dedicated technology, then harmonic suppression performance is achieved, but the overall device area increases due to bulky passive components and multiple amplifiers
Solution Approach 1:
The patent merges multiple functions (frequency division, harmonic suppression, and frequency-to-voltage conversion) into a single integrated circuit, eliminating the need for separate chips with bulky passive components and multiple amplifiers. This integration achieves the same harmonic suppression performance with significantly reduced area by sharing common substrates and optimizing component layout.
Solution Approach 2:
The patent extracts the essential frequency conversion function and implements it using a compact resonant tank circuit, removing the need for bulky passive components and multiple high-gain amplifiers that would be required in traditional separate-chip implementations. This extraction of the core function enables a much more area-efficient design while maintaining harmonic suppression performance.
Data Source
AI summary
A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal. The frequency estimation signal generator component comprises a counter component arranged to sequentially output a sequence of control signal patterns over a plurality of digital control signals under the control of an oscillating signal derived from the received input frequency signal terns. The frequency estimation signal generator further comprises a continuous waveform generator component arranged to receive the plurality of digital control signals and a weighted analogue signal for each of the received digital control signals, and to output a continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding digital control signals comprise an asserted logical state. The frequency conversion component is arranged to derive the frequency estimation signal from the continuous waveform signal output by the continuous waveform generator component.