Modulation Transference Balanced Arrangements TRIZ Cases

A counter-driven waveform generator suppresses divider harmonics, enabling low-order filtering and CMOS VCO frequency monitoring for FMCW radar.

A filtered feedback loop extracts DC from the mixer output and drives offset compensation to preserve full-duplex reception quality.

Separate mixer input terminals and switched band-group paths isolate parasitic loads, improving receiver signal quality and in-band performance.

DAC-controlled cascoded PMOS trickle currents reduce DC offset and enable higher Gilbert mixer gain and sensitivity with minimal DC power increase.

A dummy mixer portion and matched dummy load improve single-balanced mixer noise rejection while avoiding a fully differential LNA.

Periodic signal swapping in an amplitude control circuit cancels time-varying mismatches and flicker noise to keep oscillation amplitude stable.

By splitting and mixing local oscillator paths, this radar transmitter generates varied RF waveforms in one compact architecture.

Interleaved shared bootstrap circuits let an IQ passive mixer keep transistor linearity while cutting silicon area, power, and capacitive load.

Parallel switching devices with offset bias cancel gm3 variation across LO amplitudes, reducing IM3 and improving broadband mixer linearity.

Smaller switching devices in the phase-shifted mixer cut power dissipation while preserving wide locking range in a CMOS regenerative divider.

Parallel double-balanced mixer cells with series transformers cancel LO leakage and second-order distortion at low supply voltage.

Opposed-phase double-balanced mixer cores cancel LO leakage at the output, improving signal purity and reducing RF filtering needs.

A transformer-coupled commutator RF doubler boosts conversion efficiency and output power at lower supply voltage while improving fundamental suppression.

Parallel commutator cells and series transformers improve RF mixer impedance matching, linearity, power handling, and noise figure.

A split-and-mix transmitter architecture generates multiple radar waveforms on one RF path, improving flexibility, bandwidth, and size.

Bypass switches discharge parasitic capacitance before mixer activation, cutting noise and gain tilt in passive FET multi-phase mixers.

Series notch filters tuned to LO harmonics suppress switching mixer spurs while preserving signal purity with minimal noise penalty.

Shared mixer unit cells cut RF mixer circuitry, layout area, and power while preserving harmonic rejection for multi-carrier mixing.

Selectable LO buffer and mixer sizes match gain mode to improve linearity when needed while cutting power use in low-gain operation.

A capacitor-based balancing circuit holds source-gate voltage in passive mixers to improve linearity, signal resolution, and I/Q matching.

Using two 1/3-duty local signals and a sixfold resonance stage, this case raises harmonic rejection while limiting power consumption.

A common-feedback bias scheme cuts local oscillator leakage in a differential mixer, preventing IF-stage saturation and unwanted mixing.

A switching unit isolates coupler and receive paths to calibrate FDD IIP2, cut intermodulation distortion, and preserve sensitivity.

Digitally varied coupling capacitors correct quadrature LO phase error across wide bands while lowering output load and supporting higher frequency.

Half-cycle signal swapping cancels flicker-noise mismatch in oscillation amplitude control, helping keep LC tank sensor signals stable.

Switchable LO buffer and mixer paths scale circuit size with gain mode to balance receiver linearity and power consumption.

Two receive paths switch between separate and shared LO modes to handle carrier aggregation while boosting dynamic range for single-carrier reception.

Phase-shifted stacked switching creates four transitions per cycle, pushing mixer distortion harmonics away from the fundamental output.

Passive and low-voltage active diode circuits improve RF antenna detuning by limiting parasitic capacitance effects and circuit ringing.

A tunable capacitor bank and switch network cancel next-stage input capacitance to prevent band tilt and improve mixer efficiency and EVM.

Staggered polarity switching across IQ-DAC cells cuts quadrant-crossing glitches, reducing jitter and improving clock stability.

A fixed chain of delay devices and phase mixers generates accurate multi-phase clocks within one cycle while cutting control-circuit power.

Equal-length lines and parallel mixer circuits enable fast, accurate phase and amplitude correction across phased array radar channels.

Multiphase LO passive mixers with scaled switch resistances suppress 3rd and 5th harmonic spurs without added filters or higher power.

Coarse and fine tracking filters with a switchable local oscillator enable sub-100 ns channel switching across a wide RF band with lower power.

Complementary Gilbert cells and cross-coupled inverters hold mixer common-mode voltage near midpoint, enabling DC coupling without protection circuits.