Mixer Module Feedback Circuit for Full-Duplex DC Offset Reduction

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Solution Overview

Problem

In communication systems, especially those employing full-duplex techniques like 5G, direct current (DC) offsets occur when receivers and transmitters operate simultaneously, leading to performance degradation due to DC portions in mixed signals, which existing technologies fail to effectively mitigate.

Innovation Solution

A mixer module comprising a mixer, a DC offset circuit, a filter, and a controller that generates a control signal to reduce DC portions in mixed signals by filtering out AC components and adjusting the DC offset circuit accordingly, ensuring accurate signal output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If full-duplex technique is adopted for simultaneous receiving and transmitting signals, then transmission capability of wireless networks is enhanced, but DC offset occurs in the receiver leading to performance degradation

Engineering Contradiction:
Improvetransmission capabilityVSAvoidsignal reception quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the signal processing function by introducing a dedicated DC offset compensation circuit that operates separately from the main mixing and reception pathways. This circuit specifically targets and removes DC offset components without interfering with the normal full-duplex signal flow, thereby maintaining transmission capability while improving reception quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary DC offset compensation circuit that acts as a mediator between the mixer output and the subsequent signal processing stages. This intermediary component specifically addresses the DC offset problem caused by full-duplex operation without disrupting the simultaneous transmit and receive functions, thus resolving the contradiction between transmission capability and signal reception quality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If mixer processes signals with similar frequencies in full-duplex mode, then signal mixing function is performed, but DC portions are generated in the output signals

Engineering Contradiction:
Improvesignal mixing functionVSAvoidDC offset
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful DC offset generated by the mixer into a beneficial signal by extracting, processing, and using it for compensation purposes. The DC offset compensation circuit captures the DC portions, processes them through filtering and amplification, and feeds back inverted versions to cancel out the original DC offsets, thereby transforming the harmful effect into a useful correction mechanism.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements a feedback mechanism where the DC offset compensation circuit continuously monitors the output signals from the mixer, extracts DC offset components, and feeds back corrected signals to eliminate the DC portions. This closed-loop feedback system ensures that DC offset is dynamically compensated in real-time during full-duplex operation, maintaining signal quality without affecting the mixing function.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10797648B2Mixer module
Publication Date: 2020.10.06 RICHWAVE TECH CORP
  • US10797648B2 patent drawing
  • US10797648B2 patent drawing
  • US10797648B2 patent drawing

AI summary

A mixer module includes a mixer, at least one DC offset circuit, a filter and a controller. The mixer mixes an input signal to generate a first signal. The at least one DC offset circuit generates a second signal based on the first signal. The filter filters out an AC portion of the second signal and generates a third signal according to a DC portion of the second signal. The controller controls the at least one DC offset circuit based on the third signal to reduce a DC portion of the first signal.