Shared-Capacitance Passive IQ Mixer for Low-Power Bootstrapping
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Solution Overview
Problem
Modern mixer designs face challenges in achieving high bandwidth and Signal to Noise and Distortion Ratio (SNDR) due to nonlinearity of switching transistors, particularly in passive mixer architectures, which require significant silicon area and power consumption, and introduce additional complexity and mismatch sources when implementing bootstrapping for improved linearity.
Innovation Solution
The solution involves sharing several switches and capacitance among bootstrapped mixing transistors in a differential frequency conversion IQ mixer, using interleaved shared bootstrap circuits that operate at twice the Local Oscillator frequency, reducing the number of active buffers and capacitances, and optimizing the bootstrapping process to minimize power consumption and silicon area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If bootstrapping is implemented for each mixing transistor individually, then linearity is improved, but silicon area and power consumption increase significantly
Solution Approach 1:
The patent merges the bootstrap capacitances of multiple mixing transistors into shared capacitance structures. Instead of providing separate bootstrap capacitance for each mixing transistor, the invention uses shared bootstrap capacitances that are commonly accessed by multiple transistors, thereby reducing the total silicon area while maintaining the linearity improvements provided by bootstrapping.
Solution Approach 2:
The shared bootstrap capacitances serve multiple mixing transistors simultaneously, making a single capacitance structure perform the bootstrapping function for several transistors. This multi-functional approach reduces the overall component count and silicon area required while preserving the linearizing effect of bootstrapping across all mixing transistors.
2Manufacturing precision
If bootstrapping is implemented for each mixing transistor, then linearity is improved, but power consumption increases
Solution Approach 1:
By merging the bootstrap networks into shared structures, the patent reduces the total number of active switching elements and capacitance charging/discharging operations. Fewer discrete bootstrap circuits mean less dynamic power consumption while maintaining the same linearity improvement effect across all mixing transistors.
Solution Approach 2:
The shared bootstrap circuits perform the bootstrapping function for multiple transistors, reducing the overall power consumption associated with driving individual bootstrap networks. The universal bootstrap structure is efficiently shared across all mixing transistors, minimizing redundant power expenditure.
3Manufacturing precision
If individual bootstrap circuits are used for each mixing transistor, then linearity is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple individual bootstrap circuits into unified shared bootstrap structures. This merging reduces the number of separate circuit blocks, simplifies the overall device architecture, and reduces the complexity of layout and interconnection while preserving the linearity benefits of bootstrapping for all mixing transistors.
4Manufacturing precision
If more bootstrap capacitances are used, then linearity is improved, but capacitive load increases
Solution Approach 1:
The patent merges multiple discrete bootstrap capacitances into shared capacitance structures that serve multiple mixing transistors. This consolidation reduces the total capacitive load on the RF input while maintaining sufficient bootstrapping effect for all transistors, as the shared capacitances are efficiently utilized across multiple devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and silicon area by 75%, decreases capacitive load, and improves linearity by minimizing sources of mismatch and distortion, thereby enhancing the Signal to Noise and Distortion Ratio (SNDR) and overall performance of the mixer.
Implementation Method 1
the capacitor C1, the capacitor charging switches M1 and M2, and the buffered input isolation switch M5 may be shared between, e.g., two mixing transistors
Data Source
Figure 1
Figure 2~3
Figure 4
AI summary
In a passive mixer (10), switches (M1, M2, M5) and a capacitance are shared between bootstrapped mixing transistors (PNI, NNI, NPI, PPI, PNQ, NNQ, NPQ, PPQ), reducing the number of components required as compared to prior art bootstrap designs. Shared bootstrap circuits (16, 18, 20, 22) operate in an interleaved fashion between I and Q mixer circuits (12, 14), at twice the LO frequency. That is, the shared bootstrap circuits (20, 22) in each Q mixer circuit (12) charge their capacitors in a first half-period of a clock (Clk), and connect the shared capacitor to the gate of an enabled mixing transistor (PNQ, NNQ, NPQ, PPQ) in the second half-period. The shared bootstrap circuits (16, 18,) in the I mixer circuit (14) charge their capacitors in the second half-period, and connect the shared capacitor to the gate of an enabled mixing transistor (PNI, NNI, NPI, PPI,) in the first half- period. One of two mixing transistors (PNI, NNI, NPI, PPI, PNQ, NNQ, NPQ, PPQ) connected to each shared bootstrap circuit (16, 18, 20, 22) is alternately enabled during the clock signal half-periods that the shared bootstrap circuit (16, 18, 20, 22) is not charging its capacitor.