Differential-Pair Frequency Multiplier With Harmonic Feedback
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Solution Overview
Problem
Existing frequency multipliers require substantial input power and have low efficiency, especially as frequencies increase, leading to degraded system performance in radio and RF applications.
Innovation Solution
A frequency multiplier using a switching component with differential pairs of transistors and a gain stage that generates common-mode feedback to amplify even harmonics, allowing for efficient frequency multiplication by mixing the input signal with amplified common-mode harmonics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If transistors are driven to a nonlinear region to generate harmonics, then frequency multiplication is achieved, but input power requirements increase substantially
Solution Approach 1:
The patent applies feedback by extracting even harmonics from the switching component output and feeding them back to the gain stage, which then amplifies them for combination with the input signal. This feedback mechanism enables efficient frequency multiplication without requiring substantial input power to drive transistors into hard nonlinear regions.
Solution Approach 2:
The patent changes the operating parameters by using differential pairs of transistors in a switching configuration that generates harmonics, then selectively extracts and amplifies even harmonics through a gain stage. This parameter change approach allows frequency multiplication with reduced power requirements compared to traditional single-stage nonlinear operation.
2Productivity
If transistors are driven hard to generate desired harmonics, then frequency multiplication is achieved, but efficiency decreases
Solution Approach 1:
The feedback mechanism extracts even harmonics from the switching component and feeds them back through a gain stage for amplification. This allows the system to achieve efficient frequency multiplication by constructively combining the input signal with amplified harmonics, thereby improving energy efficiency compared to driving transistors hard without feedback.
Solution Approach 2:
The patent utilizes the periodic nature of harmonic generation in the switching component, extracting even harmonics at specific intervals and feeding them back through the gain stage. This periodic action optimizes energy efficiency by amplifying harmonics only when needed, rather than continuously driving transistors into nonlinear regions.
3Speed
If frequency multiplication is performed at higher frequencies, then desired output frequency is achieved, but efficiency becomes worse and system performance degrades
Solution Approach 1:
The feedback mechanism becomes increasingly important at higher frequencies by extracting and amplifying even harmonics through the gain stage. This feedback approach compensates for the natural efficiency degradation at higher frequencies by constructively combining amplified harmonics with the input signal, thereby maintaining system performance.
Solution Approach 2:
The patent employs dynamic operation by using switching components that operate in a time-varying manner, generating harmonics that are then dynamically amplified by the gain stage and fed back to the input. This dynamic approach allows the system to maintain efficiency at higher frequencies where static operation would degrade performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves efficiency and reduces power requirements, enabling effective frequency tripling or other multiples with higher output frequencies, such as from 8 GHz to 24 GHz, while maintaining system performance.
Implementation Method 1
Frequency multipliers, for example, frequency triplers that triple the input frequency, typically operate by driving one or more transistors to a nonlinear region of operation. In this nonlinear region of operation, higher order harmonics are generated.
Implementation Method 2
A common mode feedback generated by the switching component is also provided to the gain stage. The method further includes amplifying the common-mode feedback harmonics with a gain stage to generate an amplified common-mode signal
Implementation Method 3
using the amplified common-mode signal with the single input signal to generate a multiplied frequency signal
Data Source
AI summary
A frequency multiplier is provided that includes a switching component having a plurality of differential pairs of transistors. The frequency multiplier further includes a gain stage. A common mode feedback generated by the switching component is also provided to the gain stage.