FTJ Memory Structure With Laser-Crystallized Ferroelectric Layer

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Solution Overview

Problem

Existing dielectric-based memory devices, particularly ferroelectric tunnel junction (FTJ) memory devices, face challenges in achieving sufficient crystallization of the ferroelectric layer without damaging the front-end-of-line (FEOL) structures during thermal treatment, as excessive heat can cause deterioration.

Innovation Solution

A process involving a light-transmissive top electrode layer that allows laser annealing to heat the ferroelectric layer between 400° C and 1000° C, promoting crystallization while minimizing heat exposure to FEOL structures, and exerting stress to achieve ferroelectricity without damaging the FEOL structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If thermal treatment is applied to crystallize the ferroelectric layer, then crystallization is improved, but FEOL structures are damaged

Engineering Contradiction:
Improvecrystallization of ferroelectric layerVSAvoidheat damage to FEOL structures
Core Design Contradiction:
Stability of the object's compositionVSObject-affected harmful factors

Solution Approach 1:

The patent segments the thermal treatment process into two distinct approaches: (1) conventional thermal annealing applied to the entire structure, and (2) laser annealing that selectively heats only the ferroelectric layer through the light-transmissive top electrode. This segmentation allows crystallization of the ferroelectric layer without exposing FEOL structures to damaging heat, as the laser energy is confined to the BEOL region where the ferroelectric layer resides.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by making the top electrode light-transmissive (transparent to laser wavelength) so that laser annealing can selectively heat the ferroelectric layer in the BEOL region without affecting FEOL structures. This creates a localized heating zone precisely where crystallization is needed, while leaving other regions (FEOL structures) unaffected by thermal damage.

Inventive Principle:
Principle #3Local quality

2Stability of the object's composition

If laser annealing is used to heat the ferroelectric layer, then crystallization is enhanced, but the top electrode must be light-transmissive which complicates material selection

Engineering Contradiction:
Improvecrystallization of ferroelectric layerVSAvoidmaterial selection constraints
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by selecting specific materials for the top electrode (such as metal oxides like indium tin oxide, zinc oxide, or fluorine-doped tin oxide) that have both required electrical conductivity and light-transmissive properties at the laser wavelength used. By changing the material parameters to satisfy both electrical and optical requirements, the patent resolves the complexity of material selection while enabling laser annealing for enhanced crystallization.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the ferroelectric layer is crystallized at high temperature, then ferroelectric properties are improved, but integration with BEOL structures becomes difficult

Engineering Contradiction:
Improveferroelectric propertiesVSAvoidintegration with BEOL structures
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent extracts the thermal treatment process from the conventional high-temperature annealing approach and replaces it with laser annealing that delivers equivalent or superior crystallization效果 at lower overall temperatures. By taking out the excessive heat exposure that causes integration issues, the patent maintains improved ferroelectric properties while enabling better compatibility with BEOL structures that cannot withstand high temperatures.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively crystallizes the ferroelectric layer, enhancing its ferroelectric properties while ensuring the FEOL structures remain undamaged, thereby improving the integration and performance of FTJ memory devices in back-end-of-line (BEOL) structures.

Implementation Method 1

A process is provided involving a light-transmissive top electrode layer that allows laser annealing to heat the ferroelectric layer between 400° C and 1000° C, promoting crystallization

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 2

The top electrode layer is formed of a conductive material that allows transmission of radiation from a laser source

Methodology Applied
Scientific EffectLight transmission: Light

Implementation Method 3

laser annealing to heat the ferroelectric layer between 400° C and 1000° C, promoting crystallization

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Implementation Method 4

exerting stress to achieve ferroelectricity without damaging the FEOL structures

Methodology Applied
Scientific EffectStress: Tension

Data Source

PatentUS20230292525A1Memory structure and method of forming the same
Publication Date: 2023.09.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230292525A1 patent drawing
  • US20230292525A1 patent drawing
  • US20230292525A1 patent drawing

AI summary

A device structure according to the present disclosure includes a conductive feature disposed in a first dielectric layer, a ferroelectric tunnel junction (FTJ) stack disposed over the conductive feature, a spacer disposed along sidewalls of the FTJ stack, a second dielectric layer disposed over the spacer and the FTJ stack, a second dielectric layer disposed over the spacer and the FTJ stack, and a contact via extending through the second dielectric layer. The FTJ stack includes a bottom electrode layer electrically coupled to the conductive feature, a ferroelectric layer over the bottom electrode layer, and a top electrode layer on the ferroelectric layer. The top electrode layer is formed of a conductive metal oxide.