Automated Functional Verification Goal Generation from Constraints
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Solution Overview
Problem
Existing testbench systems for integrated circuit (IC) chip design require manual specification of constraints and goals for simulation, which can lead to incomplete coverage of events of interest, as there is no guarantee that randomly generated test vectors will reach all desired events, even with infinite simulation duration.
Innovation Solution
A computer program automatically generates goals for functional verification by applying predetermined rules to user-specified constraints, converting them into templates that identify signals and their target values, and using these to measure coverage during simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual specification of goals is used, then coverage measurement can be performed, but the process is time-consuming and prone to incomplete coverage
Solution Approach 1:
The system performs preliminary action by automatically generating coverage goals from constraint specifications before simulation begins. The goal generation process uses the already-written constraints to create comprehensive goal sets, eliminating the need for separate manual goal specification and ensuring complete coverage measurement capability is established in advance.
Solution Approach 2:
The system enables self-service by allowing the constraint specification to automatically generate the corresponding coverage goals. The constraints themselves contain sufficient information to derive goals, so the system serves itself by extracting goals from existing constraints without requiring additional manual intervention or separate goal writing processes.
2Productivity
If random test vectors are generated, then simulation can proceed, but there is no guarantee that all events of interest will be covered
Solution Approach 1:
The system implements feedback by using coverage goals derived from constraints to monitor and measure whether simulated test vectors actually achieve the desired coverage. This feedback mechanism allows verification that random testing is effectively covering all constrained events, providing confidence that productivity gains from random testing do not sacrifice coverage completeness.
Solution Approach 2:
The system performs preliminary action by generating comprehensive coverage goals from constraints before simulation starts. This ensures that all events of interest are identified in advance, allowing the random test generation to be guided toward achieving complete coverage of these predetermined goals, thus guaranteeing coverage completeness while maintaining simulation productivity.
3Measurement precision
If more goals are manually specified, then coverage coverage is improved, but the complexity of testbench increases
Solution Approach 1:
The system enables self-service by automatically generating comprehensive goal sets from the constraint specifications that users already write. Since constraints are necessary for test generation anyway, extracting goals from these existing constraints provides complete coverage measurement capability without adding separate goal specification processes or increasing testbench complexity.
Solution Approach 2:
The system applies universality by making the constraint specification serve dual purposes: both guiding test vector generation and defining coverage goals. This multi-functionality eliminates the need for separate goal writing, as the same constraint language simultaneously controls testing and measurement, thereby improving coverage measurement accuracy without increasing testbench complexity.
Data Source
AI summary
A computer is programmed to automatically generate in memory, goals for functional verification of a design of a circuit by use of constraints that are specified in the normal manner. Specifically, a predetermined set of rules are automatically applied to the constraints, on random values for signals to be input to the circuit during simulation of the design. Application of the rules identifies one or more templates of goal(s) to be met. The computer is programmed to automatically use constraint(s) and template(s) to instantiate goal(s) in memory. Each goal identifies a signal to be input to the circuit, and defines a counter for a value of the signal. The goals are used in the normal manner, i.e. used to measure coverage of functional verification during simulation of the design of the circuit.