Flipped Voltage Follower Regulator Biasing for Better Load Response

The regulator is divided into multiple functional modules: a flipped voltage follower module (MP1, MN1, MN2) for voltage regulation, a bias voltage generating module (MP2, MN3, MN4) for providing stable bias currents, and a compensation capacitor (C1) for stability. This segmentation allows each module to be optimized independently, resolving the contradiction between maintaining high sourcing ability and improving load response performance.

The patent implements a feedback mechanism where the output voltage is fed back through the FVF architecture to the gate of the P-type transistor MP1. This feedback loop, combined with the bias voltage generating circuit, dynamically adjusts the operating point to maintain stable voltage output while responding to load changes, thereby improving load response without sacrificing sourcing ability.

The patent changes the operating parameters of the transistors by introducing a dedicated bias voltage generating circuit that provides optimized bias currents. The bias voltages Vbias1 and Vbias2 are specifically designed to set the transistors in their optimal operating regions, achieving both low output impedance and high gain simultaneously by adjusting the bias conditions rather than changing the fundamental FVF architecture.

The bias voltage generating circuit acts as an intermediary that mediates between the supply voltage and the FVF core circuit. It provides stabilized bias voltages that enable the FVF to achieve both low output impedance and high gain by controlling the operating points of the transistors, thus resolving the contradiction between these two performance parameters.

The feedback mechanism in the FVF architecture, combined with the bias voltage generating circuit, creates a regulated system that rejects power supply variations. The output voltage feedback through the FVF loop dynamically compensates for supply voltage changes, maintaining stable output voltage while preserving the low output impedance characteristic of the FVF architecture.

By separating the bias voltage generation function from the main FVF regulation function, the patent allows the bias circuit to provide stable reference voltages that are less sensitive to power supply variations. This segmentation enables the FVF core to maintain low output impedance while the overall system achieves improved power supply rejection through the stabilized biasing.