Dc-Dc Conversion TRIZ Cases

A primary power stage drives secondary phases from one PWM controller, cutting pin count, cost, and high-frequency noise coupling.

Simultaneous measurement and switch commands let a resonant converter sample regulation variables before activation, enabling stable MHz control.

Bit-stream current sharing lets point-of-load converters compute average and error signals in real time, reducing turn-on delay in COT control.

Time-divided excitation of transformer sub-windings with different turns improves DC-DC voltage regulation while avoiding bias excitation.

Detection and delay circuitry hold current limiting until load voltage settles, preventing inrush spikes and output brownout.

A switched inductor-diode bias circuit limits auxiliary-winding voltage swings, protecting low-voltage primary controllers in offline converters.

A capacitor-based boost circuit lifts write-driver voltage above a low supply level, improving memory write reliability without continuous high power.

Secondary-side drain-voltage sensing turns off the SR FET within nanoseconds to avoid CCM cross-conduction in flyback converters.

A bidirectional DC terminal lets EV chargers draw from storage modules without breaker panel upgrades, even when panel capacity is fully used.

Secondary-side timing of the synchronous rectifier enables primary-switch ZVS in a flyback converter without primary-secondary communication.

A master-slave shut-off layout lets one solar string switch power another, cutting device cost and maintaining stable isolation during low generation.

Current feedback raises or lowers switch reference voltage to keep high-side and low-side control effective while cutting converter power loss.

A test loop sources or sinks current at the converter output to calibrate the feedback loop faster, with simpler testing and stable operation.

Feedforward correction adjusts switching control from first-voltage changes to keep second voltage on target without feedback delay.

A bias-generating circuit and compensated FVF topology improve load response, gain, load regulation, and PSR without sacrificing stability.

Threshold-based inductor current control lets a buck-boost converter switch rapidly between step-up and step-down modes with simpler drive logic.

Current adjustment across parallel vehicle power paths maintains failure-time operation continuity while reducing redundancy and heat imbalance.

Precomputed search tables replace high-resolution ADC and complex compensators, cutting power-converter control area and power use.

Opposite-polarity secondary windings create canceling noise paths in a flyback converter, cutting EMI without complex filter circuits.

Multiple soft-start end conditions enable resonant converters to switch from frequency to duty control without transients or stress spikes.

A dual-loop PWM circuit cuts light-load power use by switching from high-frequency digital sensing to synthesized current control.

Spaced capacitors and guided airflow cool closely packed transistors, improving heat dissipation while maintaining low resistance.

Selective SR phase shifting expands LLC converter gain range while cutting turn-off losses and preserving primary-side ZVS.

A high-voltage switch is reused for startup and power conversion, removing startup resistors to cut standby loss and circuit complexity.

A protection circuit lets high-voltage current sensing keep fine resolution while reducing overvoltage at the AD converter input.

Using a wide-range, high-linearity transconductance amplifier in a type-II compensator helps DC-DC converters resist PVT variation.

Mode switching based on input voltage, output voltage, and coil current improves voltage matching while cutting conduction losses and EMI.

An intermediate return-to-zero phase cuts output voltage swing in a driver stage, reducing switching losses and power consumption.

Fractional-turn shields in a planar multilayer transformer cut common-mode noise, enabling smaller EMI filters and higher power density.

Pulse-width and feedback-based gate drive control slows primary-side voltage rise when needed to suppress secondary voltage spikes in flyback supplies.

Feedback-based interleaving keeps phase differences constant in multi-phase switching regulators, stabilizing output voltage and balancing current.

An isolated sense signal is blended with integrated current feedback to regulate LED load power and maintain stable dimming across a wide range.

A third coupled winding generates reverse current to cancel common-mode noise across wide frequencies, cutting filter count, size, and loss.

Node-voltage feedback adjusts clamp-switch timing to discharge parasitic capacitance before main-switch turn-on and reduce flyback switching loss.

By shifting the non-modulated PWM edge from each phase's current error, this case balances multiphase converter currents and avoids over-current.

An adaptive feedback loop tunes charging current to correct PVT-driven ramp errors and keep PWM sawtooth amplitude on target.

Two-stage gate current control uses drain-source resistance sensing to suppress PMOS source voltage oscillations from wire inductance.

Coordinated control of intermediate voltages removes transformer isolation, cuts switching losses, and prevents ground current.

Adaptive COT control with masterless current sharing keeps output voltage stable under dynamic loads without complex compensation networks.

DC bus voltage feedback suppresses circular DC current in parallel inverters, improving efficiency and preventing damage.

Two-stage gate current control and resistance detection suppress wire-inductance voltage oscillations in PMOS high-side DC-DC switching.

Selectable sensing resistors and feedback keep LED current and voltage precise across a wide range, reducing energy waste and load stress.

A dual-source control supply keeps the loop controller and driver powered at light load without auxiliary windings, cutting cost and complexity.

Skipping the off period after maximum transistor on-time helps a switching power supply recover output voltage faster under load changes.

A P-FET-assisted buck converter keeps the bootstrap capacitor charged in DCM and redirects resonance to improve low-load stability.

A target voltage generator tracks critical-path frequency to improve voltage regulation efficiency and response under changing loads.

A split time-based loop uses oscillator and delay-line control with inductor-current injection to mitigate RHP zero and widen boost-converter bandwidth.

Voltage-drop detection and adaptive gate timing let a flyback converter switch at transistor voltage valleys, cutting turn-on loss.

Random pulse omission broadens the converter spectrum during light-load operation to suppress EMI, EMR, and noise peaks.

A switched-capacitor boost circuit switches between doubler and tripler modes to maintain inverter DC bus voltage from a smaller battery pack.