GAA Nanostructure Barrier Layer for Source/Drain Diffusion Control

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Solution Overview

Problem

The integration of multi-gate devices in semiconductor manufacturing is challenging due to increased complexity and issues with gate control, OFF-state current, and short-channel effects.

Innovation Solution

The implementation of a gate all around (GAA) transistor structure with a barrier layer between the inner spacer layer and the source/drain structure to improve gate control and prevent dopant diffusion and S/D structure damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multi-gate devices are integrated to improve gate control and reduce short-channel effects, then device performance is improved, but fabrication complexity increases

Engineering Contradiction:

Improvegate controlVSAvoidfabrication complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The fabrication process is divided into distinct stages: forming sacrificial nanostructures, depositing spacer layers, selectively removing portions to create cavities, and forming barrier layers. This segmentation allows complex multi-gate device fabrication to be broken down into manageable steps, reducing overall fabrication complexity while maintaining improved gate control.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Sacrificial nanostructures are formed in advance before the actual gate structure is created. These preliminary structures serve as templates that guide subsequent spacer deposition and cavity formation, simplifying the overall fabrication process by establishing the geometric framework early in the manufacturing sequence.

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If dopant diffusion is allowed during manufacturing, then manufacturing process is simpler, but S/D structure damage occurs

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidS/D structure integrity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

A barrier layer is introduced as an intermediary between the source/drain structures and the manufacturing environment. This barrier layer prevents harmful dopant diffusion and structural damage during subsequent manufacturing steps, allowing the process to proceed without compromising S/D structure integrity while maintaining relative manufacturing simplicity.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier layer is formed in advance before any dopant diffusion or structural damage can occur. This preliminary protective measure cushions the S/D structures against potential harm during subsequent manufacturing operations, ensuring structural integrity is maintained throughout the fabrication process.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20250063781A1Semiconductor structure and method for forming the same

Publication Date: 2025.02.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of nanostructures formed over a substrate, and an inner spacer layer between two adjacent nanostructures. The semiconductor structure includes a source/drain (S/D) structure formed adjacent to the inner spacer layer, and a barrier layer adjacent to the inner spacer layer. The barrier layer extends from the first position to the second position, and the first position is between the inner spacer layer and the nanostructure, and the second position is between the nanostructures and the S/D structure.