GAA Nanostructure Contact Layout With Isolation Margin Control
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Solution Overview
Problem
The integration of gate-all-around (GAA) transistor structures in semiconductor manufacturing is challenging due to the complexity of forming features around silicon nanowires, which hinders further miniaturization and performance enhancement.
Innovation Solution
A semiconductor structure is developed using a combination of photolithography and self-aligned processes, including the formation of sacrificial layers, spacers, and final gate stacks that wrap around nanostructures, allowing for enhanced gate control and reduced short-channel effects, while enabling the enlargement of contact plugs near isolation transistors without compromising isolation margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used to form GAA features around nanowires, then manufacturing simplicity is maintained, but manufacturing precision and gate control are insufficient
Solution Approach 1:
The patent segments the gate formation process into multiple distinct stages: forming sacrificial layers around nanowires, depositing spacers on sacrificial layers, removing sacrificial layers, and forming final gate stacks. This segmentation allows each stage to be optimized independently, achieving precise gate-all-around control while managing process complexity through systematic breakdown of the fabrication sequence
Solution Approach 2:
The patent employs preliminary actions by first forming sacrificial layers around nanowires before depositing gate materials. These sacrificial layers serve as temporary structures that define the gate position and shape, enabling precise gate-all-around formation. The preliminary sacrificial layer structure is later removed after the gate is formed, demonstrating how preliminary actions facilitate precise final structures
2Productivity
If device dimensions are scaled down to improve production efficiency, then productivity increases, but manufacturing precision and process complexity worsen
Solution Approach 1:
The patent employs self-aligned processes where spacers automatically form at precise locations relative to sacrificial layers without additional alignment steps. The conformal deposition of spacers on sacrificial layers ensures that gate structures are self-positioned with high precision, eliminating the need for complex photolithography alignment procedures and maintaining manufacturing precision during scaling
Solution Approach 2:
The patent transitions from two-dimensional planar transistors to three-dimensional gate-all-around structures. The gate wraps around the nanowire channel in all directions, providing control from top, bottom, and sidewalls. This dimensional transition enhances gate control and manufacturing precision at scaled dimensions by utilizing vertical and radial dimensions in addition to the horizontal plane
3Ease of operation
If contact plugs are enlarged near isolation transistors, then ease of operation improves, but isolation margins deteriorate
Solution Approach 1:
The patent applies different properties to different regions: isolation regions receive dedicated isolation gate stacks with specific materials and structures optimized for electrical isolation, while contact regions allow enlarged contact plugs for ease of fabrication. The selective formation of isolation structures in specific locations enables local optimization of both contact accessibility and isolation performance without compromising either requirement
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a first transistor. The first transistor includes a first set of nanostructures vertically stacked and spaced apart from one another, a first gate stack wrapping around the first set of nanostructures and extending in a first direction, and a first source/drain feature and a second source/drain feature adjoining opposite sides of the first set of nanostructures. The semiconductor structure also includes a first contact plug over the first source/drain feature and a second contact plug over the second source/drain feature. As measured in a second direction which is perpendicular to the first direction, a width of the second contact plug is greater than a width of the first contact plug.