GAA FET Gate Trench Process to Prevent Epitaxial Overgrowth
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in forming non-planar transistors with precise dimensions and avoiding undesired epitaxial growth, which can lead to structural collapse and material incompatibilities during processing.
Innovation Solution
A method for forming a gate-all-around field-effect-transistor (GAA FET) device involves creating a dummy gate structure over semiconductor layers, forming source/drain structures, and then replacing it with an active gate structure, using materials unfavorable for epitaxial growth, and forming a gate spacer after source/drain structures, thereby controlling material selection and reducing the risk of collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional manufacturing processes are used to form non-planar transistors, then integration density can be improved, but structural collapse and undesired epitaxial growth occur leading to manufacturing failures
Solution Approach 1:
A dummy gate structure is formed over the fin structure before source/drain structures are created. This preliminary gate structure serves as a protective framework that prevents structural collapse during subsequent epitaxial growth processes, enabling reliable manufacturing of non-planar transistors at advanced technology nodes
2Ease of manufacture
If conventional gate formation processes are used, then manufacturing simplicity is maintained, but undesired epitaxial growth occurs causing material incompatibilities
Solution Approach 1:
The dummy gate structure acts as an intermediary element that prevents direct contact between the fin structure and epitaxial growth materials during source/drain formation. This intermediary barrier blocks undesired epitaxial growth while allowing the manufacturing process to continue with standard procedures
3Device complexity
If the gate structure is formed early in the process, then process sequence is simplified, but critical dimensions of the active gate structure cannot be precisely controlled
Solution Approach 1:
The gate formation process is segmented into two distinct stages: first forming a dummy gate structure for process support, then replacing it with the active gate structure for precise dimension control. This segmentation allows each stage to optimize for its specific function, achieving both process simplicity and dimensional precision
4Strength
If materials favorable for epitaxial growth are used during source/drain formation, then source/drain quality is improved, but the gate structure becomes incompatible and collapses
Solution Approach 1:
The dummy gate structure serves as a protective intermediary that enables the use of epitaxially-friendly materials for source/drain formation without compromising gate structure integrity. The dummy gate prevents direct interaction between the fin structure and growth materials, allowing high-quality source/drain formation while maintaining structural stability
Data Source
AI summary
A method for fabricating a semiconductor device is provided. The method includes forming a fin structure extending along a first lateral direction; forming a dummy gate structure that is over a portion of the fin structure and extends along a second direction perpendicular to the first lateral direction; growing source/drain structures that are respectively coupled to ends of the portion of the fin structure; removing the dummy gate structure to form a gate trench; lining inner sidewalls of the gate trench with a gate spacer; and forming an active gate structure in the gate trench.