GAA FET Isolation Recess Profile for Leakage and Epi Protection
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Solution Overview
Problem
Existing GAA FET devices and fabrication methods are not entirely satisfactory due to issues such as leakage current and damage to epitaxial materials during the cut-OD process, particularly in forming recess profiles and controlling the depth and width of etched regions.
Innovation Solution
A method is introduced that modifies the recess profile in the cut-OD process using a sidewall spacer and anisotropic etching to mitigate leakage issues and reduce damage to epitaxial materials, involving the formation of a semiconductor structure with a multi-gate FET device, nanosheet stacks, and epitaxial source/drain structures, where the recesses are formed with a desired depth and width to minimize material consumption and enhance electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate electrode is positioned adjacent to three side surfaces of a channel region (FinFET structure), then the gate structure surrounds the fin on three sides providing good control, but the bottom part of the channel region is positioned far away from the gate electrode resulting in poor gate control and short-channel effects
Solution Approach 1:
The patent transitions from a three-sided gate wraparound structure to a four-sided gate-all-around structure by extending the gate electrode to surround the channel region on all sides including the bottom. This dimensional change in gate positioning eliminates the uncontrolled bottom surface and achieves complete gate control over the channel region, resolving the short-channel effects issue.
2Ease of manufacture
If conventional fabrication processes are used for GAA FET devices, then manufacturing can proceed with existing methods, but damage occurs to epitaxial materials during the fabrication process
Solution Approach 1:
The patent introduces a recess formation step performed before subsequent fabrication steps. This preliminary action creates a recess structure that protects epitaxial materials from damage during later processing, while maintaining compatibility with existing fabrication methods.
Solution Approach 2:
The patent introduces a dielectric layer as an intermediary element between the gate electrode and the channel region. This dielectric layer serves as a protective mediator that prevents direct contact and potential damage to the epitaxial materials while still allowing the gate to exert its control function.
3Productivity
If the channel region is not fully depleted due to uncontrolled bottom side, then manufacturing is simpler, but device performance is reduced due to leakage issues
Solution Approach 1:
The patent segments the channel region by forming a recess that divides it into distinct portions. This segmentation creates better electrical isolation and enables complete depletion of the channel region, eliminating leakage paths while maintaining manufacturing feasibility through standardized processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces leakage current and minimizes damage to epitaxial materials, achieving improved electrical isolation and device performance by optimizing the recess profile through controlled etching and spacer use.
Implementation Method 1
A method is described involving anisotropic etching and the use of sidewall spacers to form recess profiles
Data Source
AI summary
A semiconductor structure includes a substrate, a multi-gate FET device disposed over the substrate, a first isolation disposed in the substrate, and a second isolation disposed in the substrate. The multi-gate FET device includes a gate structure and epitaxial source/drain structures disposed at two sides of the gate structure. The first isolation includes a first portion and a second portion over the first portion. A top surface of the second portion is aligned with a top surface of the epitaxial source/drain structures. A width of the second portion is different from a width of the first portion.