GAA Transistor Interfacial Layer Nitrogen Doping for Gate Control
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing low-cost, high-performance, and low-power integrated circuits (ICs) due to the complexity introduced by miniaturization, particularly in integrating gate-all-around (GAA) transistor features around silicon nanowires.
Innovation Solution
A semiconductor structure is developed with n-type and p-type transistors, where nitrogen is incorporated into the interfacial layer of the n-type transistor to thin down the capacitance equivalent thickness, while the interfacial layer of the p-type transistor remains undoped, optimizing the gate control and threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nitrogen is incorporated into the interfacial layer to thin down capacitance equivalent thickness, then gate control is improved, but process complexity increases
Solution Approach 1:
The patent applies selective nitrogen incorporation only to the interfacial layer of n-type transistors, while p-type transistors maintain undoped interfacial layers. This local differentiation optimizes gate control for n-type devices without unnecessarily complicating the overall manufacturing process, resolving the contradiction between improved reliability and increased process complexity.
Solution Approach 2:
The patent modifies the chemical composition parameter of the interfacial layer by incorporating nitrogen specifically in n-type transistor regions. This parameter change reduces the capacitance equivalent thickness and improves gate control, while the selective application keeps process complexity manageable through targeted modification rather than universal changes.
2Productivity
If miniaturization is pursued to improve production efficiency, then production efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements selective nitrogen doping in specific transistor regions (n-type only) rather than applying uniform processing across all devices. This localized approach enables continued miniaturization and improved production efficiency while avoiding the manufacturing complexity that would arise from comprehensive process changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the DC and RO performance of the semiconductor device by improving gate control and reducing off-state gate leakage, while maintaining the scalability and compatibility with conventional CMOS processes.
Implementation Method 1
nitrogen is incorporated into the interfacial layer of the n-type transistor to thin down the capacitance equivalent thickness
Data Source
AI summary
A method for forming a semiconductor structure is provided. The method includes forming a first nanostructure and a second nanostructure over a substrate, forming a first interfacial layer on the first nanostructure and a second interfacial layer on the second nanostructure, forming a first gate dielectric layer on the first interfacial layer and a second gate dielectric layer on the second interfacial layer, forming a patterned mask layer on the second gate dielectric layer while exposing the first gate dielectric layer, and driving nitrogen into the first interfacial layer, thereby forming a nitrogen-doped interfacial layer.