GAA Nanosheet Etching for Precise Inner Spacer Profiles
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving precise control over the profiles of nanosheets and inner spacers in gate all around (GAA) transistor structures, which affects the electrical mobility and quality of the gate structure, particularly due to issues with oxygen impurities and native oxides in the semiconductor layers.
Innovation Solution
A method involving hydrogen radical treatment and selective chemical dry etching processes is employed to remove oxygen impurities and recess the semiconductor layers, followed by forming inner spacers and gate structures, ensuring precise control over the profiles and enhancing the electrical properties of GAA transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used to form nanosheets and inner spacers, then manufacturing simplicity is maintained, but profile precision and electrical mobility deteriorate due to oxygen impurities and native oxides
Solution Approach 1:
The patent applies preliminary action by performing hydrogen radical treatment and selective etching processes before forming the inner spacers and gate structures. This preliminary removal of oxygen impurities and native oxides from semiconductor layers ensures that subsequent processing steps produce nanosheets and inner spacers with precise profiles and improved electrical mobility, avoiding the need for rework or additional corrective steps later in the manufacturing process.
2Reliability
If hydrogen radical treatment and selective etching are applied, then electrical mobility and profile quality improve, but manufacturing complexity and process difficulty increase
Solution Approach 1:
The patent utilizes parameter changes by carefully controlling the hydrogen radical treatment conditions (such as treatment time, temperature, and hydrogen flow rate) and selective etching parameters (such as etchant composition, temperature, and duration). These controlled parameter changes enable the removal of oxygen impurities and native oxides while preserving the desired profile of nanosheets and inner spacers, achieving improved electrical mobility without requiring overly complex process equipment or procedures.
3Manufacturing precision
If oxygen impurities and native oxides are removed through hydrogen radical treatment, then electrical properties improve, but processing time and manufacturing complexity increase
Solution Approach 1:
The patent implements continuity of useful action by integrating the hydrogen radical treatment and selective etching processes into a continuous manufacturing sequence without unnecessary interruptions or intermediate steps. The processes are designed to flow seamlessly from one step to the next, maintaining production momentum while effectively removing oxygen impurities and native oxides. This continuous approach minimizes idle time and ensures consistent quality of gate structures throughout production.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the profiles of nanosheets and inner spacers, boosting electrical mobility and the quality of the gate structure, while maintaining good etching selectivity between different semiconductor layers, suitable for mass production.
Implementation Method 1
a hydrogen radical treatment is performed on the remaining first and second semiconductor layers
Implementation Method 2
a selective chemical dry etching process is performed using a gas mixture including a hydrogen-containing gas and a fluorine-containing gas to laterally recess the first semiconductor layers
Data Source
AI summary
A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.