Active Region Necking Profile for Residue-Free GAA Source/Drain Etching
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Solution Overview
Problem
Current source/drain etching techniques in multigate devices, such as gate-all-around (GAA) devices, leave behind semiconductor residue, creating weak points and increasing complexity in IC manufacturing.
Innovation Solution
A method involving alternating etching processes with specific etchant gases and parameters to create a necking profile in the active region, ensuring full etching of the source/drain regions without residue, using a combination of chlorine-containing and fluoride-containing gases to achieve selective etching in different directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current source/drain etching techniques are used in GAA devices, then etching can be performed, but semiconductor residue is left behind creating weak points
Solution Approach 1:
The etching process is divided into multiple sequential steps with different etchants (chlorine-containing gas followed by fluoride-containing gas). Each step targets specific portions of the semiconductor material, allowing complete removal without residue. The multi-step segmented approach ensures that different materials (silicon vs. silicon germanium) are etched selectively at different stages.
Solution Approach 2:
The invention changes etching parameters by using different etchants with distinct chemical properties. The first etchant (chlorine-containing gas) has high etch rate for silicon but low for silicon germanium, while the second etchant (fluoride-containing gas) has high etch rate for silicon germanium. This parameter change enables selective and complete etching of different material layers.
2Reliability
If multigate devices are used to improve gate control, then gate-channel coupling increases, but source/drain etching becomes more complex
Solution Approach 1:
The complex etching challenge in multigate devices is addressed by segmenting the etching process into distinct steps. The first step uses chlorine-containing gas to etch silicon portions, and the second step uses fluoride-containing gas to etch silicon germanium portions. This segmentation simplifies each individual step while achieving the overall complex etching goal.
Solution Approach 2:
The invention applies local quality by using different etchants tailored to specific material regions. The chlorine-containing gas targets silicon regions, while the fluoride-containing gas targets silicon germanium regions. This localized approach allows precise control over etching in different areas of the multigate device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The necking profile allows for complete etching of the source/drain regions, reducing the risk of residue and improving etching efficiency, thereby enhancing the reliability and performance of GAA devices.
Implementation Method 1
performing a first etch process with a first etchant and a first etch duration, wherein the first etchant includes a chlorine-containing chemical
Implementation Method 2
performing a second etch process with a second etchant and a second etch duration where the second etchant is different than the first etchant and the second etch duration is greater than the first etch duration, wherein the second etchant includes a fluorine-containing chemical
Data Source
AI summary
Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method of manufacture comprises receiving a substrate including a semiconductor material stack formed thereon, wherein the semiconductor material stack includes a first semiconductor layer of a first semiconductor material and second semiconductor layer of a second semiconductor material that is different than the first semiconductor material. Patterning the semiconductor material stack to form a trench. The patterning includes performing a first etch process with a first etchant for a first duration and then performing a second etch process with a second etchant for a second duration, where the second etchant is different from the first etchant and the second duration is greater than the first duration. The first etch process and the second etch process are repeated a number of times. Then epitaxially growing a third semiconductor layer of the first semiconductor material on a sidewall of the trench.