GAA Nanosheet Spacer Structure for Source/Drain Dislocation Control

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Solution Overview

Problem

The growth crystal orientation mismatch between the channel and source/drain electrodes in nano Gate-All-Around Field Effect Transistors (GAA-FETs) leads to dislocation and performance issues in semiconductor devices.

Innovation Solution

A semiconductor device design featuring a channel layer stacking portion surrounded by a gate-all-around structure, with a first spacer having distinct material portions to isolate and reduce dislocation between the source/drain functional portion and the gate-all-around, using silicon nitride for the first portion and germanium silicon for the second portion, and a second spacer for further isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If a conventional Gate-All-Around structure is used with stacked nanosheet channel, then device miniaturization is achieved, but source/drain dislocation occurs due to crystal orientation mismatch

Engineering Contradiction:
Improvefeature sizeVSAvoidsource/drain dislocation
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

A first spacer structure is introduced as an intermediary component between the source/drain electrode and the gate-all-around. This spacer acts as a buffer layer that mitigates the crystal orientation mismatch stress, preventing dislocation while maintaining the miniaturized device structure. The spacer material is specifically selected to have compatible crystal orientation with the channel layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate-all-around structure is segmented into multiple sections along the channel length direction. This segmentation allows different portions of the gate to be positioned at different locations relative to the source/drain electrodes, enabling optimized electrical characteristics and reduced dislocation effects in the miniaturized device.

Inventive Principle:
Principle #1Segmentation

2Reliability

If source/drain dislocation is prevented using conventional methods, then device reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improvesource/drain dislocation preventionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The first spacer structure is merged with the gate-all-around formation process. The spacer is formed as an integrated part of the gate structure, combining two functions (isolation and gating) into a single unified structure, thereby improving reliability without proportionally increasing manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Length of moving object

If the gate-all-around is positioned close to source/drain electrodes for miniaturization, then device size is reduced, but dislocation risk increases

Engineering Contradiction:
Improvedevice sizeVSAvoiddislocation control
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The first spacer serves as a precisely controlled intermediary layer that maintains a defined separation distance between the gate-all-around and source/drain electrodes. This spacer thickness is precisely controlled during fabrication, enabling miniaturization while maintaining manufacturing precision and preventing dislocation.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If material mismatch between source/drain and channel is used for stress control, then device performance improves, but dislocation occurs at material interfaces

Engineering Contradiction:
Improvedevice performanceVSAvoidinterface dislocation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The first spacer material is specifically selected as an intermediary material that is crystal orientation compatible with the channel layer. This spacer material acts as a buffer between the source/drain electrode and channel, allowing stress control through material selection while preventing interface dislocation through crystal orientation matching.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250380459A1Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus
Publication Date: 2025.12.11 INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
  • US20250380459A1 patent drawing
  • US20250380459A1 patent drawing
  • US20250380459A1 patent drawing

AI summary

The present disclosure provides a semiconductor device, a method and an electronic apparatus. The semiconductor device includes a substrate; a channel layer stacking portion including multiple channel layers, a length direction of the channel layer is perpendicular to the thickness direction of the substrate, and the channel layer includes a first end, a middle section and a second end in the length direction; a gate-all-around surrounding the middle section; a source/drain functional portion; and a first spacer between the source/drain functional portion and the gate-all-around, between the first ends of adjacent channel layers and between the second ends of the adjacent channel layers. The first spacer includes first and second portions in the length direction, the first portion is in contact with the gate-all-around, the second portion is in contact with the source/drain functional portion. A material of the first portion is different from that of the second portion.