GAA Superlattice Liner for Mobility and Threshold Voltage Tuning
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Solution Overview
Problem
Existing semiconductor devices face challenges in enhancing charge carrier mobility and achieving optimal threshold voltage control in gate-all-around (GAA) devices due to limitations in material diffusion and scattering effects, which affect device performance and efficiency.
Innovation Solution
Incorporation of semiconductor superlattices with alternating semiconductor and non-semiconductor monolayers, such as silicon and oxygen, to reduce effective mass and enhance mobility, combined with strategic placement of non-semiconductor layers for improved work function tuning and dopant diffusion control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional semiconductor materials and structures are used, then device fabrication is simpler, but charge carrier mobility is limited due to scattering effects
Solution Approach 1:
The semiconductor layer is segmented into multiple alternating monolayers of different materials (e.g., Si, Ge, C) forming a superlattice structure. This segmentation creates distinct regions with different band structures that collectively reduce scattering effects and enhance carrier mobility beyond what a homogeneous material could achieve.
Solution Approach 2:
The patent employs composite material structures where multiple semiconductor materials (Si, Ge, C) are combined in alternating monolayers to form a superlattice. This composite approach leverages the advantageous properties of each material to achieve superior carrier mobility while managing scattering effects that would limit conventional single-material devices.
2Manufacturing precision
If metal gate electrodes are used for threshold voltage control, then device performance is improved, but work function tuning is limited by available metal options
Solution Approach 1:
The patent changes the fundamental parameter used for work function tuning from metal selection to superlattice composition control. By adjusting the materials and thicknesses of the alternating monolayers in the superlattice, the effective work function can be continuously tuned across a wide range, providing precise threshold voltage control that is not limited by discrete metal work functions.
Solution Approach 2:
The superlattice structure acts as an intermediary layer between the gate electrode and the channel, mediating the electrical characteristics. This intermediary superlattice provides the work function tuning function that would otherwise require multiple metal options, enabling precise threshold voltage control while maintaining a simplified gate electrode structure.
3Manufacturing precision
If dopant diffusion is used for threshold voltage adjustment, then device fabrication is simpler, but control precision is reduced due to diffusion uncertainty
Solution Approach 1:
The superlattice structure is formed preliminarily during the epitaxial growth stage, establishing the desired electrical characteristics before subsequent processing steps. This preliminary structuring of the semiconductor layer with controlled composition and thickness profiles enables precise threshold voltage control to be achieved early in the fabrication process, reducing reliance on later diffusion steps with inherent variability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The superlattice structure enhances charge carrier mobility and allows for precise threshold voltage control, reducing scattering effects and enabling higher device performance and integration of both high and low threshold voltage devices in constrained spaces.
Implementation Method 1
semiconductor superlattices with alternating semiconductor and non-semiconductor monolayers, such as silicon and oxygen, to reduce effective mass and enhance mobility
Implementation Method 2
dopant diffusion liner adjacent at least one of the source and drain regions and comprising a first superlattice
Data Source
AI summary
A semiconductor gate-all-around (GAA) device may include a semiconductor substrate, source and drain regions on the semiconductor substrate, a plurality of semiconductor nanostructures extending between the source and drain regions, a gate surrounding the plurality of semiconductor nanostructures in a gate-all-around arrangement, and a dopant diffusion liner adjacent at least one of the source and drain regions and comprising a first superlattice. The first superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.