GAAFET Trench Inner Spacers for Leakage Control and Substrate Cooling
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Solution Overview
Problem
Conventional gate-all-around field effect transistors (GAAFETs) face issues with leakage current and heat dissipation due to over-etched source and drain regions, which are exacerbated by deeper trench structures, leading to increased static power consumption and functional failures.
Innovation Solution
The implementation of trench inner spacers (TISs) within the GAAFET structure, formed during the manufacturing process, which extend from inner spacers to the inside of trenches, effectively prevents impurity diffusion and enhances heat dissipation by forming trenches with specific dimensions and shapes, such as an 'L'-shaped cross-section, to manage recess depth variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an insulator is deposited under the source region/drain region in BOX scheme technology, then leakage current due to over-etched source region/drain region recesses is prevented, but heat release through the substrate is obstructed due to lower thermal conductivity of the insulator
Solution Approach 1:
The isolation structure is segmented into two distinct parts: a first isolation insulator filling the trench to prevent leakage current, and a second isolation insulator formed on top to provide thermal management. This segmentation allows each layer to perform its specialized function independently, resolving the contradiction between electrical isolation and thermal dissipation.
Solution Approach 2:
Different regions of the isolation structure are assigned different material properties and functions. The lower portion (first isolation insulator) provides electrical isolation with high dielectric strength, while the upper portion (second isolation insulator) provides thermal conduction pathways. This local differentiation of quality allows simultaneous optimization of both leakage prevention and heat release.
2Area of stationary object
If the source region/drain region recess depth is increased, then the area occupied by FET is reduced enabling miniaturization, but leakage current and parasitic capacitance increase due to deeper TSD
Solution Approach 1:
The trench isolation structure is formed preliminarily before the source region/drain region recess etching process. This preliminary action creates a pre-defined isolation boundary that prevents over-etching from causing leakage, allowing the recess depth to be increased for miniaturization without compromising reliability. The trench acts as a physical stopper that limits the maximum recess depth.
Solution Approach 2:
The first isolation insulator acts as an intermediary layer between the substrate and the over-etched source region/drain region. It mediates the interaction by providing electrical isolation that prevents charge leakage while allowing the mechanical structure to accommodate deeper recesses for area reduction. The insulator layer decouples the electrical performance from the geometric dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The TISs in GAAFETs suppress leakage current and improve heat release through the substrate, enhancing production yield and reducing power consumption while maintaining process consistency, thus addressing the limitations of conventional BOX Scheme technology.
Implementation Method 1
the deeper the TSD, the more impurities in the source region/drain region diffuse toward the substrate
Implementation Method 2
it is difficult to release heat generated in a device through a Si substrate due to the thermal conductivity of the insulator lower than that of Si
Data Source
AI summary
The present disclosure discloses a gate-all-around field effect transistor which not only can suppress the occurrence of punch through in the substrates and direct leakage of current from the source region/drain region into the part under the channels, but also can facilitate heat release of the substrate, and minimizes the occurrence of device defects due to misalignment between the trench inner spacers and the device by forming trench inner spacers (TISs) and thus preventing source region/drain region impurities from diffusing into the substrate, and a method for manufacturing the same.