GaN FET C-Axis Orientation for Pinch-Off Control

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Solution Overview

Problem

Conventional AlGaN/GaN heterojunctions with a C-plane achieve high sheet carrier concentration but struggle with impurity doping accuracy, leading to difficulties in controlling pinch-off voltage and surface morphology issues, which hinder the development of normally-off type FETs with optimal performance.

Innovation Solution

A semiconductor device structure using a hexagonal crystal with 6 mm symmetry, where the first semiconductor layer has a C-axis main surface and a second semiconductor layer with a different band gap is formed, along with a gate, source, and drain electrodes, creating a heterojunction with a C-axis plane to minimize polarization effects and precise carrier control, and the film thickness of the first semiconductor layer is kept at 1.5 μm or less to prevent surface fogging and enhance carrier mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a conventional AlGaN/GaN heterojunction with C-plane is used, then high sheet carrier concentration is achieved through polarization effect, but impurity doping accuracy deteriorates and pinch-off voltage control becomes difficult

Engineering Contradiction:
Improvesheet carrier concentrationVSAvoidimpurity doping accuracy
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent changes the crystal orientation parameter from conventional C-plane to a plane including the C-axis (such as (11-20) plane), which fundamentally alters the polarization characteristics and enables precise carrier concentration control through impurity doping without being overwhelmed by spontaneous polarization effects

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a heterojunction with A-plane or M-plane is used, then carrier dispersion due to dislocation is suppressed, but surface morphology deteriorates and carrier mobility decreases

Engineering Contradiction:
Improvecarrier dispersion suppressionVSAvoidsurface morphology
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies local quality by using a heterostructure configuration where an AlGaN layer is formed on a GaN layer with C-axis orientation, creating localized regions with different properties: the GaN layer provides excellent surface morphology and high carrier mobility, while the AlGaN layer provides lattice matching and dislocation suppression

Inventive Principle:
Principle #3Local quality

3Strength

If AlGaN/GaN heterojunction with C-plane is used, then breakdown voltage and saturation threshold current are increased, but pinch-off voltage control and normally-off type FET manufacturing become difficult

Engineering Contradiction:
Improvebreakdown voltageVSAvoidnormally-off type FET manufacturing
Core Design Contradiction:
StrengthVSEase of manufacture

Solution Approach 1:

The patent changes the crystal orientation from C-plane to a plane including the C-axis, which modifies the polarization characteristics to enable precise pinch-off voltage control through impurity doping, making normally-off type FET manufacturing feasible while maintaining high breakdown voltage characteristics

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for precise control of carrier concentration, improved surface morphology, and increased drain current, enabling the realization of a high-speed, normally-off type FET with reduced on-resistance and enhanced performance characteristics.

Implementation Method 1

two-dimensional electrons are accumulated in an interface between AlGaN and GaN, which is caused by a polarization generated due to a piezo effect in the AlGaN layer because of the stress between AlGaN and GaN due to the lattice mismatch

Methodology Applied
Scientific EffectPolarization: Polarisation

Implementation Method 2

a polarization generated due to a piezo effect in the AlGaN layer because of the stress between AlGaN and GaN due to the lattice mismatch

Methodology Applied
Scientific EffectPiezo effect: Piezoelectric Effect

Data Source

PatentUS8089096B2Field effect transistor with main surface including C-axis
Publication Date: 2012.01.03 PANASONIC HOLDINGS CORP
  • US8089096B2 patent drawing
  • US8089096B2 patent drawing
  • US8089096B2 patent drawing

AI summary

A normally-off type field effect transistor includes: a first semiconductor layer which is made of a first hexagonal crystal with 6 mm symmetry and has a main surface including a C-axis of the first hexagonal crystal; a second semiconductor layer which is formed on the main surface of the first semiconductor layer and is made of a second hexagonal crystal with 6 mm symmetry having a band gap different from a band gap of the first hexagonal crystal; and a gate electrode, a source electrode and a drain electrode that are formed on the second semiconductor layer. Here, the film thickness of the first nitride semiconductor layer is 1.5 μm or less and the second semiconductor layer is doped with impurities at a dose of 1×1013 cm−2 or more.