GaN Semiconductor Chip with Core-Shell Nano-Rods
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The efficiency of GaN-based light-emitting diodes is limited by the 'droop' effect, where efficiency drops significantly as current or charge carrier density increases, making it challenging to achieve higher efficiencies without increasing costs or etendue, especially in applications like projection devices.
Innovation Solution
The optoelectronic semiconductor chip is designed with a multiplicity of active regions, such as core-shell nano- or microrods, which increases the active volume and efficiency while reducing charge carrier density, and can be grown on non-conventional substrates, allowing for cost-effective production and efficient current distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the current or charge carrier density is increased to improve efficiency, then the light output increases, but the efficiency drops significantly due to the droop effect
Solution Approach 1:
The patent divides the semiconductor chip into a multiplicity of active regions (e.g., core-shell nano- or microrods) instead of using a single large active region. This segmentation allows the total light output to be achieved through multiple smaller regions operating at lower current densities, thereby avoiding the droop effect while maintaining high overall efficiency
Solution Approach 2:
The patent transitions from a planar two-dimensional active region to three-dimensional core-shell nano- or microrod structures. This dimensional change increases the active volume and surface area for light emission while maintaining lower charge carrier density in each individual rod, thus improving efficiency without sacrificing light output
2Power
If the active area is increased to improve efficiency, then more light can be emitted, but the etendue increases which is problematic for projection devices
Solution Approach 1:
The patent employs core-shell structures where one material is nested within another (e.g., GaN core with AlGaN shell). This nested architecture increases the effective active volume and light emission capability within a compact footprint, thereby increasing light output without proportionally increasing the etendue
Solution Approach 2:
By transitioning to three-dimensional nano- or microrod structures, the patent increases the active volume available for light emission without increasing the planar footprint. This allows more light to be generated within the same etendue constraints, making it suitable for projection devices
3Ease of manufacture
If conventional substrates are used for growth, then the manufacturing process is well-established, but the production is not cost-effective and material strain is high
Solution Approach 1:
The patent changes the substrate material parameters from conventional expensive substrates (such as sapphire or SiC) to cost-effective alternatives like silicon or glass. This parameter change reduces material costs significantly while the core-shell structure and nano-rod geometry are designed to accommodate the different lattice parameters, managing material strain through the multi-layer architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the semiconductor chip's efficiency under operating current conditions by increasing the active area and reducing material strain, while maintaining cost-effectiveness and enabling efficient radiation emission.
Implementation Method 1
During the operation of the optoelectronic semiconductor chip, electromagnetic radiation, in particular light, is generated in the active regions
Implementation Method 2
The carrier is that element of the optoelectronic semiconductor chip which mechanically carries and supports the multiplicity of active regions
Data Source
AI summary
An optoelectronic semiconductor chip includes a number active regions that are arranged at a distance from each other and a substrate that is arranged on an underside of the active regions. One of the active regions has a main extension direction. The active region has a core region that is formed using a first semiconductor material. The active region has an active layer that covers the core region at least in directions perpendicular to the main extension direction of the active region. The active region has a cover layer that is formed using a second semiconductor material and covers the active layer at least in directions perpendicular to the main extension direction of the active region.