GaN Half-Bridge Package Low Inductance Design
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic packages for high-power, high-frequency semiconductor devices, such as GaN-based devices, face challenges in achieving low inductance and high thermal conduction while meeting high voltage creepage and clearance requirements, which are essential for efficient power conversion in applications like power conversion circuits.
Innovation Solution
The development of integrated half-bridge components with GaN-based semiconductor dies mounted on die pads, connected via low inductance and low parasitic capacitance interconnects, and encapsulated with a dielectric material to provide high voltage isolation, along with specialized connection layouts to accommodate external connections that exceed the internal spacing, enabling efficient power conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional electronic packages are used for high-power, high-frequency semiconductor devices, then the devices can be packaged and connected, but the inductance and parasitic capacitance are too high, reducing power conversion efficiency
Solution Approach 1:
The package structure is segmented into distinct functional zones: a first region for the low-side device, a second region for the high-side device, and a third region for high-voltage isolation. This segmentation allows each region to be optimized independently, reducing overall inductance and parasitic capacitance while maintaining manageable structural complexity
Solution Approach 2:
The patent transitions from planar two-dimensional layouts to three-dimensional vertical stacking, with devices arranged in multiple regions along the vertical axis. This dimensional change enables shorter current paths and reduced loop areas, significantly lowering inductance without increasing the package footprint
2Quantity of substance
If the spacing between internal connections is reduced to improve power density, then more devices can be integrated, but the high voltage creepage and clearance requirements are not met
Solution Approach 1:
Different spacing requirements are applied to different regions of the package: tight spacing is used within the low-side and high-side device regions to maximize integration density, while a significantly larger spacing is maintained in the third region dedicated to high-voltage isolation between the source and drain terminals
Solution Approach 2:
A dedicated third region acts as an intermediary isolation zone between the low-side and high-side devices. This intermediate region provides the necessary creepage and clearance paths for high-voltage isolation while allowing the other regions to maintain high device density
3Reliability
If thermal conduction is enhanced by improving heat transfer capability, then device reliability increases, but the package structure becomes more complex
Solution Approach 1:
The electrical connection structure is merged with the thermal conduction path. The same low-inductance interconnects that provide electrical connectivity also serve as thermal conduction paths, eliminating the need for separate thermal management structures and reducing overall package complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient power conversion by reducing inductance and parasitic capacitance, enhancing thermal conduction, and meeting high voltage isolation requirements, thus improving the performance and reliability of power conversion circuits.
Implementation Method 1
An electrically insulative encapsulant is formed around the first and the second semiconductor dies
Implementation Method 2
enhancing thermal conduction
Data Source
AI summary
Leadless electronic packages for GaN-based half bridge power conversion circuits have low inductance internal and external connections, high thermal conductivity and a large separation between external connections for use in high voltage power conversion circuits. Some electronic packages employ “L” shaped power paths and internal low impedance die to die connections. Further embodiments employ an insulative substrate disposed within the electronic package for efficient power path routing and increased packaging density.