GaN HEMT Doped Layer Segmentation for Leakage Control
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Solution Overview
Problem
GaN-based semiconductor materials used in high-frequency and high-temperature applications face degradation due to environmental factors, leading to reduced gate controllability and electrical uniformity in HEMT devices.
Innovation Solution
A semiconductor structure with a doped compound semiconductor layer having openings or notches is designed, reducing the area of the doped compound semiconductor layer to minimize environmental impact and improve gate controllability, featuring a substrate, channel layer, barrier layer, source and drain structures, and a dielectric layer with the doped compound semiconductor layer exposed to reduce the proportion of the compound semiconductor layer, thereby enhancing current driving capability and electrical uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the doped compound semiconductor layer is used to improve current driving capability, then the gate controllability deteriorates due to environmental factors such as temperature and oxidation
Solution Approach 1:
The doped compound semiconductor layer is segmented by introducing openings (first openings and second openings) that divide the continuous layer into isolated regions. This segmentation reduces the total exposed surface area of the doped layer, minimizing environmental degradation while preserving sufficient conductive pathways to maintain current driving capability.
Solution Approach 2:
Different regions of the semiconductor structure are given different properties: the doped compound semiconductor layer provides high conductivity in localized areas, while the openings expose the underlying barrier layer with different electrical characteristics. This local differentiation allows optimization of both current driving (in doped regions) and gate controllability (reduced leakage through openings).
2Power
If the doped compound semiconductor layer area is increased to enhance current driving capability, then the device becomes more susceptible to environmental degradation and oxidation
Solution Approach 1:
Portions of the doped compound semiconductor layer are extracted or removed to form openings, exposing the underlying barrier layer. This extraction reduces the total area of the doped layer that is susceptible to oxidation and environmental degradation, while the remaining doped regions maintain sufficient conductivity for current driving.
Solution Approach 2:
The barrier layer exposed through the openings acts as a protective interface that is less susceptible to environmental degradation compared to the doped compound semiconductor layer. This creates a more stable, inert-like environment at the exposed surfaces, reducing oxidation and improving long-term reliability.
3Reliability
If the doped compound semiconductor layer is reduced to improve gate controllability, then the current driving capability may be compromised
Solution Approach 1:
Rather than completely removing the doped compound semiconductor layer, openings are introduced to partially reduce its area. This partial action is sufficient to improve gate controllability by reducing leakage pathways, while the remaining doped regions maintain adequate current driving capability.
4Power
If the doped compound semiconductor layer is made continuous to ensure current driving capability, then the manufacturing precision and electrical uniformity deteriorate
Solution Approach 1:
The continuous doped compound semiconductor layer is segmented into isolated regions by openings. This segmentation improves manufacturing precision by allowing better control over doping distribution and reduces electrical non-uniformity caused by environmental degradation, while maintaining sufficient current pathways.
Data Source
AI summary
A semiconductor structure includes a substrate, a channel layer, a barrier layer, a source structure, a drain structure, a doped compound semiconductor layer, a dielectric layer, and a gate structure. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The source structure and the drain structure are disposed on opposite sides of the barrier layer. The doped compound semiconductor layer is disposed on the barrier layer. The doped compound semiconductor layer has a first side adjacent to the source structure and a second side adjacent to the drain structure. The doped compound semiconductor layer has at least one opening exposing at least a portion of the barrier layer. The dielectric layer is disposed on the doped compound semiconductor layer and the barrier layer. The gate structure is disposed on the doped compound semiconductor layer.